M.T. Bulsara

Massachusetts Institute of Technology, Cambridge, Massachusetts, United States

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Publications (52)122.63 Total impact

  • Adam Jandl, Mayank T. Bulsara, Eugene A. Fitzgerald
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    ABSTRACT: The properties of InAsxP1−x compositionally graded buffers grown by metal organic chemical vapor deposition are investigated. We report the effects of strain gradient (ε/thickness), growth temperature, and strain initiation sequence (gradual or abrupt strain introduction) on threading dislocation density, surface roughness, epi-layer relaxation, and tilt. We find that gradual introduction of strain causes increased dislocation densities (>106/cm2) and tilt of the epi-layer (>0.1°). A method of abrupt strain initiation is proposed which can result in dislocation densities as low as 1.01 × 105 cm−2 for films graded from the InP lattice constant to InAs0.15P0.85. A model for a two-energy level dislocation nucleation system is proposed based on our results.
    Journal of Applied Physics 04/2014; 115(15):153503-153503-8. · 2.21 Impact Factor
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    ABSTRACT: Strain fields arising from a non-uniform distribution of misfit dislocations in an underlying compositionally graded buffer are shown to be sufficiently strong to modify indium incorporation in III-phosphide light emitting layers. Composition fluctuations (xIn±0.02) in lattice-mismatched (AlyGa1−y)xIn1−xP thin films with length-scales of 5–10 μm and a broadened light emission spectra are observed. Cathodoluminescence, photoluminescence and wavelength dispersive x-ray spectroscopies are used in this analysis to generate spatial maps of luminescence spectra and element distributions in metal-organic chemical vapor deposition (MOCVD) grown films. It is seen that these fluctuations due to misfit dislocations are hard to eliminate via growth-kinetics alone but can be lowered through the use of miscut substrates or spacer layers between the graded buffer layer and the active layer. A link between crosshatch surface-roughness and group-III atom distribution under group-V rich growth conditions in both AlInP and GaInP films is also demonstrated. In summary, the interaction of the dislocation strain field with the growth surface can affect the optical characteristics of lattice-mismatched LEDs even if the final threading dislocation density is low.
    Journal of Crystal Growth 04/2014; 392:74–80. · 1.55 Impact Factor
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    ABSTRACT: We report the performance of a 1 eV GaNAsSb photovoltaic cell grown on a Si substrate with a SiGe graded buffer grown using molecular beam epitaxy. For comparison, the performance of a similar 1 eV GaN0.018As0.897Sb0.085 photovoltaic cell grown on a GaAs substrate was also reported. Both devices were in situ annealed at 700 °C for 5 min, and a significant performance improvement over our previous result was observed. The device on the GaAs substrate showed a low open circuit voltage (VOC) of 0.42 V and a short circuit current density (JSC) of 23.4 mA/cm2 while the device on the Si substrate showed a VOC of 0.39 V and a JSC of 21.3 mA/cm2. Both devices delivered a quantum efficiency of 50%–55% without any anti-reflection coating.
    Applied Physics Letters 01/2014; 104(10):103906-103906-4. · 3.52 Impact Factor
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    ABSTRACT: We combine the transient thermal grating and time-domain thermoreflectance techniques to characterize the anisotropic thermal conductivities of GaAs/AlAs superlattices from the same wafer. The transient grating technique is sensitive only to the in-plane thermal conductivity while the time-domain thermoreflectance is sensitive to the cross-plane direction, making them a powerful combination to address the challenges associated with characterizing aniso-tropic heat conduction in thin films. We compare the experimental results from the GaAs/AlAs superlattices with first-principles calculations and previous measurements of Si/Ge SLs. The measured anisotropy is smaller than that of Si/Ge SLs, consistent with both the mass-mismatch picture of interface scattering and with the results of calculations from density-functional perturbation theory with interface mixing included.
    Nano Letters 08/2013; · 13.03 Impact Factor
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    ABSTRACT: We have measured the lifetimes of two zone-center longitudinal acoustic phonon modes, at 320 and 640 GHz, in a 14 nm GaAs/2 nm AlAs superlattice structure. By comparing measurements at 296 and 79 K we separate the intrinsic contribution to phonon lifetime determined by phonon-phonon scattering from the extrinsic contribution due to defects and interface roughness. At 296 K, the 320 GHz phonon lifetime has approximately equal contributions from intrinsic and extrinsic scattering, whilst at 640 GHz it is dominated by extrinsic effects. These measurements are compared with intrinsic and extrinsic scattering rates in the superlattice obtained from first-principles lattice dynamics calculations. The calculated room-temperature intrinsic lifetime of longitudinal phonons at 320 GHz is in agreement with the experimentally measured value of 0.9 ns. The model correctly predicts the transition from predominantly intrinsic to predominantly extrinsic scattering; however the predicted transition occurs at higher frequencies. Our analysis indicates that the 'interfacial atomic disorder' model is not entirely adequate and that the observed frequency dependence of the extrinsic scattering rate is likely to be determined by a finite correlation length of interface roughness.
    Journal of Physics Condensed Matter 07/2013; 25(29):295401. · 2.22 Impact Factor
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    ABSTRACT: Direct-bandgap InAlP alloy has the potential to be an active material in nitride-free yellow-green and amber optoelectronics with applications in solid-state lighting, display devices, and multi-junction solar cells. We report on the growth of high-quality direct-bandgap InAlP on relaxed InGaAs graded buffers with low threading dislocation densities. Structural characterization reveals phase-separated microstructures in these films which have an impact on the luminescence spectrum. While similar to InGaP in many ways, the greater tendency for phase separation in InAlP leads to the simultaneous occurrence of compositional inhomogeneity and CuPt-B ordering. Mechanisms connecting these two structural parameters are presented as well as results on the effect of silicon and zinc dopants on homogenizing the microstructure. Spontaneous formation of tilted planes of phase-separated material, with alternating degrees of ordering, is observed when InAlP is grown on vicinal substrates. The photoluminescence peak-widths of these films are actually narrower than those grown on exact (001) substrates. We find that, despite phase-separation, ordered direct-bandgap InAlP is a suitable material for optoelectronics.
    Journal of Applied Physics 05/2013; 113(18). · 2.21 Impact Factor
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    ABSTRACT: The control of heat conduction through the manipulation of phonons as coherent waves in solids is of fundamental interest and could also be exploited in applications, but coherent heat conduction has not been experimentally confirmed. We report the experimental observation of coherent heat conduction through the use of finite-thickness superlattices with varying numbers of periods. The measured thermal conductivity increased linearly with increasing total superlattice thickness over a temperature range from 30 to 150 kelvin, which is consistent with a coherent phonon heat conduction process. First-principles and Green's function-based simulations further support this coherent transport model. Accessing the coherent heat conduction regime opens a new venue for phonon engineering for an array of applications.
    Science 11/2012; 338(6109):936-9. · 31.20 Impact Factor
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    ABSTRACT: We measure the lifetime of the zone-center 340 GHz longitudinal phonon mode in a GaAs-AlAs superlattice excited and probed with femtosecond laser pulses. By comparing measurements conducted at room temperature and liquid nitrogen temperature we separate the intrinsic (phonon-phonon scattering) and extrinsic contributions to phonon relaxation. The estimated room temperature intrinsic lifetime of 0.95 ns is compared to available calculations and experimental data for bulk GaAs. We conclude that ~0.3 THz phonons are in the transition zone between Akhiezer and Landau-Rumer regimes of phonon-phonon relaxation at room temperature.
    Applied Physics Letters 10/2012; 102(4). · 3.52 Impact Factor
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    ABSTRACT: In this paper, we demonstrate high electron mobility In0.53Ga0.47As quantum-well metal oxide semiconductor field effect transistor (MOSFET) structures. The Al2O3 (gate dielectric)/ In0.53Ga0.47As-In0.52Al0.48As (barrier)/In0.53Ga0.47As (channel) structures were fabricated, and the mobility was obtained by Hall measurements. The structures with in-situ chemical vapor deposition (CVD) Al2O3 displayed higher mobility than identical structures fabricated with in situ atomic layer deposition Al2O3, which indicates that CVD process resulted in a lower Al2O3/In0.53Ga0.47As interfacial defect density. A gate bias was applied to the structure with CVD Al2O3, and a peak mobility of 9243 cm2/V s at a carrier density of 2.7 × 1012 cm−2 was demonstrated for the structure with a 4 nm In0.53Ga0.47As-In0.52Al0.48As barrier. A model based on internal phonon scattering and interfacial defect coulomb scattering was developed to explain the experimental data and predict the mobility of In0.53Ga0.47As MOSFET structures.
    Journal of Applied Physics 05/2012; 111(10). · 2.21 Impact Factor
  • Yu Bai, Mayank T. Bulsara, Eugene A. Fitzgerald
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    ABSTRACT: High quality epitaxial germanium (Ge) thin films grown on lattice matched and mismatched III-V compound may lead to development of new electronic and optoelectronic devices. Understanding the doping and electronic properties of these Ge thin films is the first step in this development. In this paper, we report on high-quality epitaxial Ge thin films grown on GaAs and AlAs by metal-organic chemical vapor deposition. Cross-sectional transmission electron microscopy and atomic force microscopy reveal the high structural quality of the Ge thin films. Using photoluminescence, secondary ion mass spectrometry, and spreading resistance analysis, we investigated the unintentional doping characteristics of the fabricated Ge-on-III-V thin films. We found that arsenic (n-type doping) concentration is determined by the background partial pressure of volatile As-species (e.g., As2 and As4), which incorporate into the Ge thin films via gas phase transport during the growth. Group III element (p-type doping) incorporation in the Ge thin films occurs during the growth through a surface exchange process. There exists a trade-off between Ge film structural quality and group III element “auto-doping.” III-V compound surfaces that are group III element-rich facilitate the initiation of Ge thin films with high crystalline quality and low surface roughness. However, the group-III-rich surfaces also result in high group III element (p-type doping) concentrations in the Ge thin films.
    Journal of Applied Physics 01/2012; 111(1). · 2.21 Impact Factor
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    ABSTRACT: The methodology for a heterodyned laser-induced transient thermal grating technique for non-contact, non-destructive measurements of thermal transport in opaque material is presented. Phase-controlled heterodyne detection allows us to isolate pure phase or amplitude transient grating signal contributions by varying the relative phase between reference and probe beams. The phase grating signal includes components associated with both transient reflectivity and surface displacement whereas the amplitude grating contribution is governed by transient reflectivity alone. By analyzing the latter with the two-dimensional thermal diffusion model, we extract the in-plane thermal diffusivity of the sample. Measurements on a 5 {\mu}m thick single crystal PbTe film yielded excellent agreement with the model over a range of grating periods from 1.6 to 2.8 {\mu}m. The measured thermal diffusivity of 1.3 \times 10-6 m2/s was found to be slightly lower than the bulk value.
    Journal of Applied Physics 09/2011; 111(2). · 2.21 Impact Factor
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    ABSTRACT: Two approaches for metalorganic chemical vapor deposition (MOCVD)-grown compositionally graded metamorphic buffers on 6° offcut bulk GaAs were investigated. The first approach consisted of tandem graded layers of InGaAs and InGaP with compositional grading of the In concentration. This tandem approach was found to be necessary because phase separation in the InGaAs alloys leads to surface roughening and high threading dislocation density when grading to lattice constants greater than that of In0.30Ga0.70As. An InxGa1−xAs graded buffer was grown at 700 °C for low In concentration (XIn=0–0.10) and then the growth temperature was decreased to 450 °C for high In concentration (XIn=0.10–0.30) to suppress the phase separation. The growth temperature was then increased to 650 °C and the graded InyGa1−y P system was implemented to continue grading the lattice constant from In0.30Ga0.70As to InP, which allowed us to achieve InP on 6° offcut GaAs with a threading dislocation density of 7.9×106 cm−2 and an RMS surface roughness of 33.0 nm on a 40 μm×40 μm AFM scale. The second approach used GaAsSb alloys with compositional grading of the Sb concentration. Graded mixed-anion GaAsSb alloys grown at 575 °C did not exhibit phase separation, resulting in high quality InP lattice constant films on GaAs without the need to transition to another material system for compositional grading. We demonstrated a GaAsSb alloy on GaAs (with a grading rate of 1.06% strain/μm) lattice-matched to InP with a threading dislocation density of 4.7×106 cm−2 and a roughness of 7.4 nm on a 40 μm×40 μm AFM scale. It was further demonstrated that the threading dislocation density of the GaAsSb graded buffer can be lowered to 2.7×106 cm-2 with a slower grading rate (0.64% strain/μm).Highlights► Compositionally-graded InGaAs–InGaP alloys and GaAsSb alloys for metamorphic InP on GaAs are studied. ► Graded InyGa1−yP system was implemented to continue grading the lattice constant from In0.30Ga0.70As to InP. ► GaAs1−xSbx did not exhibit phase separation, resulting in high quality InP lattice constant films on GaAs.
    Journal of Crystal Growth 06/2011; 324(1):103-109. · 1.55 Impact Factor
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    ABSTRACT: We present recent results on the direct heterogeneous integration of InP HBTs and Si CMOS on a silicon template wafer or SOLES (Silicon On Lattice Engineered Substrate). InP HBTs whose performance are comparable to HBTs on the native InP substrates have been repeatedly achieved. 100% heterogeneous interconnect yield has been achieved on daisy chain test structures with CMOS-InP HBT spacing (interconnect length) as small as 2.5um. In DARPA COSMOS Phase 1 we designed and fabricated a differential amplifier that met the program Go/NoGo metrics with first pass design success. As the COSMOS Phase 2 demonstration vehicle we designed and fabricated a low power dissipation, high resolution, 500MHz bandwidth digital-to-analog converter (DAC).
    Compound Semiconductor Integrated Circuit Symposium (CSICS), 2010 IEEE; 11/2010
  • Journal of Vacuum Science & Technology B - J VAC SCI TECHNOL B. 01/2010; 28(3).
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    ABSTRACT: Silicon-on-Lattice Engineered Substrates (SOLES) are SOI substrates with embedded Ge layers that facilitate III-V compound integration for advanced integrated circuits. The new materials integration scheme in SOLES requires the analysis of its thermal stability and diffusion barrier properties. In this study, we report on the successful monolithic integration of CMOS/III-V transistors with a reduced CMOS thermal budget. We further investigated the ultimate thermal budget limits for the SOLES platform. We demonstrated a new SOLES structure incorporating a SiN x interlayer, which adds greater integration flexibility for future circuit applications.
    10/2009;
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    ABSTRACT: We present results on the direct monolithic integration of III-V devices and Si CMOS on a silicon substrate. InP HBTs (0.5 times 5 um<sup>2</sup> emitter) with ft and fmax > 200 GHz were grown directly in windows adjacent to CMOS transistors on silicon template wafers or SOLES (Silicon on Lattices Engineered Substrates). A BCB based multilayer interconnect process was used to interconnect the InP HBT and Si CMOS to create a differential amplifier demonstration circuit. The heterogeneously integrated differential amplifier serves as the building block for high speed, low power dissipation mixed signal circuits such as ADCs and DACs.
    Microwave Symposium Digest, 2009. MTT '09. IEEE MTT-S International; 07/2009
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    ABSTRACT: We present results on the direct monolithic integration of III-V devices and Si CMOS on a silicon substrate. Through optimization of device fabrication and material growth processes III-V devices with electrical performance comparable to devices grown on native III-V substrates were grown directly in windows adjacent to CMOS transistors on silicon template wafers or SOLES (Silicon on Lattices Engineered Substrates). While the results presented here are for InP HBTs, our direct heterogeneously integration approach is equally applicable to other III-V electronic (FETs, HEMTs) and opto-electronic (photodiodes, VSCLS) devices and opens the door to a new class of highly integrated, high performance, mixed signal circuits.
    Indium Phosphide & Related Materials, 2009. IPRM '09. IEEE International Conference on; 06/2009
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    ABSTRACT: We report on a direct epitaxial growth approach for the heterogeneous integration of high-speed III–V devices with Si CMOS logic on a common Si substrate. InP-based heterojunction bipolar transistor (HBT) structures were successfully grown on Si-on-lattice-engineered- substrate (SOLES) and Ge-on-insulator-on-Si (GeOI/Si) substrates using molecular beam epitaxy. Structurally, the epiwafers exhibit sharp interfaces and a threading dislocation density of 3.5×107 cm−2 as measured by plan-view transmission electron microscopy. HBT devices fabricated on GeOI/Si substrates have current gain of 55–60 at a base sheet resistance of 650–700 Ω/sq, and ft and fmax of around 220 GHz. HBT structures with DC and RF performance similar to those grown on lattice-matched InP were also achieved on patterned SOLES substrates with growth windows as small as 15×15 μm2. These results demonstrate a promising path of heterogeneous integration and selective placement of III–V devices at arbitrary locations on Si CMOS wafers.
    Journal of Crystal Growth 01/2009; 311(7):1979-1983. · 1.55 Impact Factor
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    ABSTRACT: We report on a direct epitaxial growth approach for the heterogeneous integration of high speed III-V devices with Si CMOS logic on a common Si substrate. InP-based heterojunction bipolar transistor (HBTs) structures were successfully grown on patterned Si-on-Lattice-Engineered-Substrate (SOLES) substrates using molecular beam epitaxy. DC and RF performance similar to those grown on lattice-matched InP were achieved in growth windows as small as 15×15μm2. This truly planar approach allows tight device placement with InP-HBTs to Si CMOS transistors separation as small as 2.5 μm, and the use of standard wafer level multilayer interconnects. A high speed, low power dissipation differential amplifier was designed and fabricated, demonstrating the feasibility of using this approach for high performance mixed signal circuits such as ADCs and DACs.
    MRS Proceedings. 12/2008; 1194.
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    ABSTRACT: We summarize our work on creating substrate platforms, processes, and devices for the monolithic integration of silicon CMOS circuits with III-V optical and electronic devices. Visible LEDs and InP HBTs have been integrated on silicon materials platforms that lend themselves to process integration within silicon fabrication facilities. We also summarize research on tensile Ge, which could be a high mobility material for III-V MOS, and research on an in-situ MOCVD Al<sub>2</sub>O<sub>3</sub>/GaAs process for III-V MOS.
    Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. 9th International Conference on; 11/2008

Publication Stats

677 Citations
122.63 Total Impact Points

Institutions

  • 1997–2014
    • Massachusetts Institute of Technology
      • Department of Materials Science and Engineering
      Cambridge, Massachusetts, United States
  • 2001
    • The Ohio State University
      • Department of Electrical and Computer Engineering
      Columbus, OH, United States