M.Z. Khan

Publications (5)0 Total impact

• Conference Proceeding: A very low voltage design for different CMOS low-noise amplifier topologies at 5 GHz

  Yanjie Wang, M.Z. Khan
  [show abstract] [hide abstract]
  ABSTRACT: A very low-voltage design for two different low noise amplifier (LNA) topologies at 5 GHz has been designed, laid out and simulated using Spectre simulator in a standard TSMC 0.18 mum CMOS technology. The proposed LNA topology achieves better performance than conventional cascode topology and are confirmed by simulation results. The LNA provides a high gain of 20 dB, a noise figure of 1.4 dB, power dissipation of 1.9 mW from a 0.65 V power supply. To the best of author's knowledge this is the lowest voltage supply CMOS LNA design reported to date
  Circuits and Systems, 2005. 48th Midwest Symposium on; 09/2005
• Conference Proceeding: A 0.65V, 2.4GHz CMOS low-noise amplifiers design with noise optimization

  M.Z. Khan, Yanjie Wang, S.M. Ali, R. Raut
  [show abstract] [hide abstract]
  ABSTRACT: A 0.65 V, 2.4 GHz low noise amplifier (LNA) has been designed and simulated using spectre simulator in a standard TSMC 0.18 mum CMOS technology. With low power and noise optimization techniques, the amplifier provides a gain of 27 dB, a noise figure of only 1.1 dB, power dissipation of 4.6 mW from a 0.65 V power supply
  Electrical and Computer Engineering, 2005. Canadian Conference on; 06/2005
• Conference Proceeding: A fully differential CMOS limiting amplifier with active inductor for optical receiver

  Yangjie Wang, M.Z. Khan, R. Raut
  [show abstract] [hide abstract]
  ABSTRACT: A fully differential CMOS limiting amplifier with low voltage drop active inductors and inversely scaled amplifier stages for bandwidth enhancement is presented in this paper. The amplifier is designed in a TSMC 0.18 mum CMOS technology and SpectreS simulations shows a bandwidth of 1.8 GHz, a differential gain of 44 dB, and a power dissipation of 3.7 mW from 1 V power supply
  Electrical and Computer Engineering, 2005. Canadian Conference on; 06/2005
• Conference Proceeding: Comparison of different CMOS low-noise amplifiers topologies for bluetooth applications

  M.Z. Khan, Yanjie Wang, R. Raut
  [show abstract] [hide abstract]
  ABSTRACT: A 0.65 V, 2.4 GHz, low noise amplifier (LNA) has been designed and simulated using Spectre simulator in a standard TSMC 0.18 mum CMOS technology. With low power and noise optimization techniques, the amplifier provides a gain of 27 dB, a noise figure of only 1.1 dB, power dissipation of 4.6 mW from a 0.65 V power supply. The proposed LNA achieves superior performance over conventional cascode topology and are confirmed by simulation results
  Wireless and Microwave Technology, 2005. WAMICON 2005. The 2005 IEEE Annual Conference; 05/2005
• Source

  Available from: usf.edu

  Conference Proceeding: Comparison of different CMOS low- noise amplifiers topologies for bluetooth applications

  M.Z. Khan, Yanjie Wang, R. Rant
  [show abstract] [hide abstract]
  ABSTRACT: Not Available
  Wireless and Microwave Technology, 2005. WAMICON 2005. The 2005 IEEE Annual Conference; 02/2005