D. Aberg

Malardalen University, Västerås, Västmanland, Sweden

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Publications (7)0 Total impact

  • A. Fard, D. Aberg
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    ABSTRACT: A novel CMOS high speed divide-by-two circuit with very low power consumption is proposed in this paper. The circuit features very low input capacitance and a wide locking range of 1.5-18 GHz with a power consumption of less than 1.3 mW at 1.8 V. The input sensitivity of the stage is improved significantly when compared to conventional dynamic loaded high frequency dividers. The concept and design issue of the circuit is presented together with a performance comparison to existing topologies. The idea is demonstrated and verified in a standard 0.18 μm CMOS process through realistic simulations originating from a complete layout using moderately extracted parasitics.
    Signals, Circuits and Systems, 2005. ISSCS 2005. International Symposium on; 08/2005
  • A. Fard, T. Johnson, D. Aberg
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    ABSTRACT: A dual-band CMOS VCO with a divide-by-two circuit, operating between 4.7-6.2/2.35-3.1 GHz is demonstrated in a 0.35mum process. The VCO phase noise is reduced by matching the transconductance and impedance of the active devices. By using a divide-by-two stage quadrature signals for the 802.11 b/g standards are obtained. The VCO is optimized for low phase noise and small amplitude variations across the tuning range. The phase noise levels are less than -116.5 and -126 dBc/Hz at 1 MHz offset in the upper and lower frequency band respectively
    Circuits and Systems, 2004. Proceedings. The 2004 IEEE Asia-Pacific Conference on; 01/2005
  • A. Fard, D. Aberg
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    ABSTRACT: A fully integrated reconfigurable 3.6-6.0 GHz 0.18μm CMOS VCO with an automatic amplitude controller (AAC) for multi-standard front-ends is proposed. Due to the wide tuning range, utilizing mixed tuning technique large amplitude variations over the band are observed. Thus a novel low noise AAC is implemented to stabilize the amplitude regardless of operation frequency. Measurements are performed both with and without the AAC loop active, showing that the AAC loops noise contributions are very small. The circuit displays phase noise levels of -124 dBc/Hz or less at 3 MHz offset within the entire frequency baud while consuming 7.7-12.2 mW of power. The relative amplitude variations over the frequency band are 100 mV.
    Circuit Theory and Design, 2005. Proceedings of the 2005 European Conference on; 01/2005
  • A. Fard, T. Johnson, D. Aberg
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    ABSTRACT: The work presents a single monolithic wide band VCO for multi-standard radios. Analysis on a differential switched capacitor circuit is performed. Its impact on phase noise and power dissipation is especially addressed. The analysis is demonstrated and verified in a fully integrated CMOS VCO that consumes 2.7 mA from a 1.8 V supply and operates with a wide frequency band from 3.5-5.3 GHz. The measured phase noise is less than -110 dBc/Hz at 1 MHz offset within the entire tuning range.
    Radio and Wireless Conference, 2004 IEEE; 10/2004
  • T. Johnson, A. Fard, D. Aberg
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    ABSTRACT: An improved high-performance dynamic-logic tristate phase-frequency detector architecture is derived through extensive time domain analysis. In particular, the impact of the reset time's on the maximum operating frequency and phase characteristics of the phase-frequency detector is discussed. The analysis is verified for the presented improved architecture and excellent agreement between theory and simulation is observed. The phase-frequency detector architecture is proven to function for supply voltages below 1 V and has an increased frequency capability of more than 20% with a power consumption of 10 μW at 500 MHz input frequency.
    Circuits and Systems, 2004. MWSCAS '04. The 2004 47th Midwest Symposium on; 08/2004
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    ABSTRACT: In this paper a comparison between two widely used VCO topologies, in standard 0.35 μm CMOS technology is presented. The VCOs, based on an NMOS and a complementary structure, are designed to operate in a wide band frequency range suited for future multi-standard WLAN radios. The comparisons are carried out from the perspectives of tuning range, power dissipation and phase noise. The results, which are based on simulations, show that both circuits are applicable for the targeted operation band of 4.5-6.5 GHz, while the complementary VCO shows less power consumption and lower phase noise levels.
    Circuits and Systems, 2004. MWSCAS '04. The 2004 47th Midwest Symposium on; 08/2004
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    ABSTRACT: This paper describes a novel Bluetooth<sup>TM</sup>-based wireless solution for IEEE 488.2 test systems as opposed to wireless LAN (WLAN) based commercial solutions. Our solution enables wireless test systems to improve on earlier Bluetooth<sup>TM</sup> interfaces for instrumentation. Achieved results are: (1) Bluetooth<sup>TM</sup>-IEEE 488.2 interface development based on a Bluecore2 Bluetooth<sup>TM</sup> module; (2) the first demonstration of wireless Bluetooth<sup>TM</sup>-IEEE 488.2 instrument control.
    AUTOTESTCON 2003. IEEE Systems Readiness Technology Conference. Proceedings; 10/2003