Wen-An Tsou

National Chiao Tung University, Hsinchu, Taiwan, Taiwan

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Publications (10)0 Total impact

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    ABSTRACT: This paper presents an analysis and enhancement of efficiency in a class-E power amplifier using MEMS inductors. The MEMS technology is proposed and demonstrated by a prototype inductor. The model of MEMS inductors is created by HFSS simulator and its simulated result has good match with the measured result. Stacked-metal layer inductors in MEMS process are also developed to increase the quality factor. The simulation result of a CMOS class-E PA with MEMS inductors shows that the increased quality factor of inductors by 2 can improve the PA's efficiency by 6%. Furthermore, we present a design methodology for optimizing the PA's efficiency.
    Microwave Conference, 2009. APMC 2009. Asia Pacific; 01/2010
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    ABSTRACT: A 0.18mm CMOS fully integrated cascode Class-E power amplifier operating in 2.5GHz/3.5GHz/5.2GHz frequency bands for polar transmitters has been proposed. The tri-band amplification is achieved by adaptation of the common-gate transistor size and the matching networks. The phase distortion from supply modulation of the Class-E is compensated by controlling the common-gate transistor gate voltage and a compensative capacitor. Simulation results show that the maximum power-added efficiency (PAE) of 30.4%, drain efficiency of 34% and output power of 18.8dBm from 2.8V supply can be achieved. The phase distortion can be compensated from 34.4° to 3.1° under supply voltage of 0.5V to 2.8V. A system co-simulation has been established for relative constellation error (RCE) evaluation and it reveals that the RCE can be improved from -23.3dB to -31.4dB in 3.5GHz frequency band.
    Proceedings of the 23rd Canadian Conference on Electrical and Computer Engineering, CCECE 2010, Calgary, Alberta, Canada, 2-5 May, 2010; 01/2010
  • Wen-An Tsou, Wen-Shen Wuen, Kuei-Ann Wen
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    ABSTRACT: A circuit technique to correct Vdd/PM distortion and improve efficiency as supply modulation of cascode class-E PAs has been proposed. The experimental result shows that the phase distortion can be improved from 20 degrees to 5 degrees. Moreover, a system co-simulation result demonstrated that the EVM can be improved from -17dB to -19dB.
    IEICE Transactions. 01/2010; 93-C:128-131.
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    ABSTRACT: A 0.18μm CMOS low noise amplifier with broadband active input matching network in the frequency band of 0.6-6GHz covers GSM/DCS/WiMAX/WLAN applications for multi-standard system integration has been proposed. The broadband LNA achieves superior flat noise figure of 2.77dB with ± 0.09dB variation 0.6-6GHz and noise figure of 2.7dB ± 0.02dB within 0.6-4GHz by using active input matching network. The simulation results show that S21 of 20dB with a ±1.5dB variation and S12 of -65dB from 0.4-6GHz can be achieved. Power consumption is 19.5mW from a supply voltage of 1.8V.
    01/2010;
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    ABSTRACT: In this work, the phase compensation techniques by means of self-biasing control and an additional tuning capacitor for polar modulated tri-band Class-E power amplifier is proposed. The tri-band power amplifier operating at 2.3~2.7/3.3~3.8/5.1~5.8 GHz for WLAN and WiMAX applications adjusts low loss Micro-Electro-Mechanical-Systems (MEMS) switches to select the matching networks. The improvement of phase distortion and system relative constellation error (RCE) is 36.4° and 8.9dB, respectively. Simulation results shows that the maximum power-added efficiency (PAE) of 34.9%, drain efficiency of 37.3%, and output power of 18.8dBm from 2.8V supply can be achieved in 0.18μm CMOS Technology.
    01/2010;
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    Wen-An Tsou, Wen-Shen Wuen, Kuei-Ann Wen
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    ABSTRACT: An auto-biasing cascode class-E PA which can compensate the Vdd/AM and Vdd/PM distortion resulting from supply modulation has been proposed. The output voltage of auto-biasing control circuit is generated and varied linearly with PApsilas supply voltage so that the cascode transistor is degenerated into a resistance and the PApsilas nonlinear distortion can be compensated. The simulation result shows that the distortion is compensated evidently and the system co-simulation demonstrated that system EVM can be improved from -17 to -19 dB. Also, the drain efficiency of the PA can be improved 15% within small supply voltage range.
    2009 Pacific-Asia Conference on Circuits, Communications and Systems, PACCS 2009, Chengdu, China, 16-17 May 2009; 01/2009
  • Wen-An Tsou, Wen-Shen Wuen, Kuei-Ann Wen
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    ABSTRACT: This work presents a fully integrated polar modulated CMOS class-E amplifier in a 0.18 μm CMOS process. The amplifier using the device-stacking topology is implemented with a self-biased control circuit, which allows the stacked device operating as a resistance, for linearizing the AM-AM and AM-PM distortion. The simulation result shows that the AM-PM distortion is reduced from 18 degrees to 3 degrees. The linearized class-E amplifier with the class-F driver stage can provide the maximum power gain of 21 dB, the maximum output power of 17 dBm, and the peak power-added efficiency (PAE) of 30% from the supply voltage of 2 V.
    Intelligent Information Technology Applications, 2007 Workshop on. 01/2009; 3:658-661.
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    ABSTRACT: For increasing demands on transceiving coverage, reliability and high resolution of sensing data in modern wireless sensor network applications, a novel digital transceiver scheme for wireless sensor node with integration of WiMAX PHY, QoS, and low-density parity check (LDPC) code had been proposed. It will be 67% energy saving to support high gain sensing amplifier thus to provide high resolution digitization of sensing data. With WiMAX based regulation, 30 mile transmission range and 74 Mbps data rate for long range and high data rate wireless sensor networks can be achieved.
    Signal Processing and Information Technology, 2007 IEEE International Symposium on; 01/2008
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    ABSTRACT: A CMOS distributed amplifier with current reuse optimization is presented. Using current reuse technique, the distributed amplifier achieves low power consumption while retaining the same gain-bandwidth product in comparison with standard common-source topology. The DA demonstrates low current consumption of only 12.9 mA with 4 dB gain from 3 to 8 GHz using a 0.18-mum CMOS technology. An analog behavior model is also developed for system-level simulation to shorten the design time and increase design quality for future integrated wide-band transceivers
    International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece; 01/2006
  • 01/2004;