H. Kitajima

Publications (15)8.12 Total impact

• Article: Nitrogen profile engineering in the interfacial SiON in a HfAlO/SiON gate dielectric by NO Re-oxidation

  K. Torii, R. Mitsuhashi, H. Ohji, T. Kawahara, H. Kitajima
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  ABSTRACT: The effects of the nitrogen profile in the SiON-interfacial layer (IL) on the mobility in FETs employing a HfAlO/SiON gate dielectric have been investigated. In order to suppress the interdiffusion between HfAlO and SiON, the nitrogen concentration in SiON should be higher than 15 at%, while the substrate interface should be oxygen-rich in order to suppress the mobility reduction. By using an NO reoxidation of NH₃ formed 0.4-nm-thick silicon nitride, the mobility reduction due to the SiON-IL was successfully suppressed, and electron and hole mobility of 92% and 88% of those for SiO₂ at V_g=1.1 V were obtained for HfAlO/SiON with equivalent oxide thickness (EOT) of 1.1 nm. By using nitrogen profile engineered SiON-IL, good equvalent oxide thickness (EOT) uniformity, low EOT, low gate leakage current, low defect density, and symmetrical threshold voltage were all achieved, indicating that a poly-Si/HfAlO/SiON gate stack would be a candidate as an alternative gate structure for low standby power FETs of half-pitch (hp)65 and hp45 technology nodes.
  IEEE Transactions on Electron Devices 03/2006; · 2.32 Impact Factor
• Article: First-principles studies of the intrinsic effect of nitrogen atoms on reduction in gate leakage current through Hf-based high-k dielectrics

  N. Umezawa, K. Shiraishi, T. Ohno, H. Watanabe, T. Chikyow, K. Torii, K. Yamabe, K. Yamada, H. Kitajima, T. Arikado
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  ABSTRACT: The atomistic effects of N atoms on the leakage current through HfO2 high-k gate dielectrics have been studied from first-principles calculations within the framework of a generalized gradient approximation (GGA). It has been found that the intrinsic effects of N atoms drastically reduce the electron leakage current. N atoms couple favorably with oxygen vacancies (VO) in HfO2 and extract electrons from VO. As a result, VO energy levels are drastically elevated due to the charged-state change in VO from neutral (VO0) to positively charged (VO2+). Accordingly, N incorporation removes the electron leakage path mediated by VO related gap states.
  Applied Physics Letters 03/2005; 86(14):143507-143507-3. · 3.84 Impact Factor
• Conference Proceeding: Charge trapping by oxygen-related defects in HfO₂-based high-k gate dielectrics

  K. Yamabe, M Goto, K Higuchi, A. Uedono, K Shiraishi, S Miyazaki, K. Torii, M. Boero, T. Chikyow, S Yamasaki, H. Kitajima, K Yamada, T. Arikado
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  ABSTRACT: Not Available
  Reliability Physics Symposium, 2005. Proceedings. 43rd Annual. 2005 IEEE International; 02/2005
• Conference Proceeding: Depletion-free poly-Si gate high-k CMOSFETs

  W.S. Kim, S. Kamiyama, T. Aoyama, H. Itoh, T. Maeda, T. Kawahara, K. Torii, H. Kitajima, T. Arikado
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  ABSTRACT: For the first time, we report poly-Si gate CMOSFETs fabricated using Hf-based stacked gate dielectrics and inverted gate implantation (IGI) that are depletion-free by virtue of the Fermi pinning effect. The sub-threshold and transconductance characteristics of surface channel IGI transistors (which include a P-doped gate for PMOS and a B-doped gate for NMOS) are enhanced because there is no gate depletion. The insertion of a thin AlOx results in some change in threshold voltage for PFETs, which demonstrated controllability of the threshold voltage by gate dielectric stack engineering. By combining IGI and gate dielectric stack engineering, high-performance depletion-free poly-Si gate high-k transistors are possible.
  Electron Devices Meeting, 2004. IEDM Technical Digest. IEEE International; 01/2005
• Conference Proceeding: Proposal of new HfSiON CMOS fabrication process (HAMDAMA) for low standby power device

  T. Aoyama, T. Maeda, K. Torii, K. Yamashita, Y. Kobayashi, S. Kamiyama, T. Miura, H. Kitajima, T. Arikado
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  ABSTRACT: The authors propose a practical half-masked Damascene-like full silicidation (HAMDAMA) process to fabricate dual gate HfSiON CMOSFET in which poly-Si and fully silicided (FUSI) NiSi gates are used for n-FET and p-FET, respectively. Using this process, I_on in p-FET was improved by thinner T_eff(inv) and higher hole mobility than the conventional poly-Si gate process.
  Electron Devices Meeting, 2004. IEDM Technical Digest. IEEE International; 01/2005
• Conference Proceeding: Physical model of BTI, TDDB and SILC in HfO2-based high-k gate dielectrics

  K. Torii, H. Kitajima, T. Arikado, K. Shiraishi, S. Miyazaki, K. Yamabe, M. Boero, T. Chikyow, K. Yamada
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  ABSTRACT: The microscopic mechanism of the degradation occurring in HfO₂-based high-k/IL dual layer gate insulator has been investigated. The hole-injection-induced release of hydrogen from Si-H terminations causes IL-breakdown. This mechanism accelerates NBTI. Defects due to electron-trapped oxygen vacancies are the origin of trap-assisted tunneling, causing SILC in the electron current and PBTI.
  Electron Devices Meeting, 2004. IEDM Technical Digest. IEEE International; 01/2005
• Source

  Available from: E. Ikenaga

  Article: Interface reaction of poly-Si/high-k insulator systems studied by hard X-ray photoemission spectroscopy

  E Ikenaga, I Hirosawa, A Kitano, Y Takata, A Muto, T Maeda, K Torii, H Kitajima, T Arikado, A Takeuchi, M Awaji, K Tamasaku, T Ishikawa, S Komiya, K Kobayashi
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  ABSTRACT: The interface reaction between poly-Si and high-k dielectrics (including HfSiON and HfAlO) have been investigated using hard X-ray (hv = 5.95 keV) photoemission spectroscopy (HX-PES). HX-PES method has enabled us to probe intrinsic interfacial states without surface conditioning, due to the large escape depth of high energy photoelectrons. From the results of take-off angle dependent data (O 1s and Si 1s core level photoemission spectra), we have found the difference of interfacial reaction concerning poly-Si and high-k dielectrics for their fabrication process. The oxidation proceeded near to surfaces by the difference in the existence of doped boron atom and in the annealing temperature for fabrication process. (c) 2005 Elsevier B.V. All rights reserved.
  Journal of Electron Spectroscopy and Related Phenomena 01/2005; 144:491-494. · 1.96 Impact Factor
• Conference Proceeding: Time-dependent dielectric breakdown of HfAlOx/SiON gate dielectric

  K. Torii, T Kawahara, R. Mitsuhashi, H. Ohji, A. Mutoh, S Miyazaki, H. Kitajima, T. Arikado
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  ABSTRACT: The breakdown characteristics of HfAlOx/SiON layered gate dielectrics were investigated. In the case of nCap accumulation or pFET inversion, the majority carrier type is hole and the time to breakdown (T_BD) under constant voltage stress (CVS) is determined by the SiON breakdown. In the case of pCap accumulation or nFET inversion, the gate current and breakdown voltage is limited by the SiON, while the T_BD is determined by the HfAlOx breakdown. The incident electron energy is found to be an important factor on the T_BD distribution.
  Solid-State Device Research conference, 2004. ESSDERC 2004. Proceeding of the 34th European; 10/2004
• Conference Proceeding: Physics in Fermi level pinning at the polySi/Hf-based high-k oxide interface

  K. Shiraishi, K. Yamada, K. Torii, Y. Akasaka, K. Nakajima, M. Kohno, T. Chikyo, H. Kitajima, T. Arikado
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  ABSTRACT: We report that O vacancy (Vo) formation in ionic Hf-based dielectrics and subsequent electron transfer into poly Si gates across the interface, definitely cause substantial flat band (Vfb) shifts especially for p+ gate MISFETs. Our theory can systematically reproduce experiments related to Hf-based dielectrics, and gives a guiding principle towards gate/high-k oxide interface control.
  VLSI Technology, 2004. Digest of Technical Papers. 2004 Symposium on; 07/2004
• Conference Proceeding: Dielectric breakdown mechanism of HfSiON/SiO2 gate dielectric

  K. Torii, T. Aoyama, S. Kamiyama, Y. Tamura, S. Miyazaki, H. Kitajima, T. Arikado
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  ABSTRACT: The breakdown mechanism of HfSiON/SiO₂ gate stacks is discussed, based on studies of the band diagram, carrier separation and charge pumping measurements. We found that both holes and electrons contribute to BD and therefore the combination of the stress polarity and the device type should be chosen carefully to evaluate the reliability.
  VLSI Technology, 2004. Digest of Technical Papers. 2004 Symposium on; 07/2004
• Conference Proceeding: SiN-capped HfSiON gate stacks with improved bias temperature instabilities for 65 nm-node low-standby-power transistors

  Y. Tamura, T. Sasaki, N. Izumi, F. Ootsuka, M. Yasuhira, T. Hoshi, S. Kume, H. Amai, T. Ida, T. Aoyama, S. Kamiyama, K. Torii, H. Kitajima, T. Arikado
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  ABSTRACT: This paper describes the SiN-capped HfSiON gate stacks for 65 nm-node low-standby-power transistors with improved bias temperature instabilities (BTI). By employing SiN-cap on HfSiON and the counter-implant for adjustment of pFET's threshold voltage (V_TH), the symmetrical V_TH values for nFETs and pFETs have been obtained. The nitrogen incorporation in the interfacial oxide prevents the interface states generation under positive bias temperature stress. Negative BTI can be improved by reducing the thickness of SiN-cap. 10-year lifetimes for both positive and negative BTI have been achieved.
  VLSI Technology, 2004. Digest of Technical Papers. 2004 Symposium on; 07/2004
• Conference Proceeding: Effects of Hf sources, oxidizing agents, and NH₃ radicals on properties of HfAlO_x films prepared by atomic layer deposition

  T Kawahara, K. Torii, R. Mitsuhashi, A. Mutoh, A Horiuchi, H Ito, H. Kitajima
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  ABSTRACT: In this paper, we investigated the influence of the combination of precursors on the deposition rate, the uniformity, the amount of residual impurities, together with electrical properties.
  Gate Insulator, 2003. IWGI 2003. Extended Abstracts of International Workshop on; 12/2003
• Conference Proceeding: Improvement in the uniformity and the thermal stability of Hf-silicate gate dielectric by plasma-nitridation

  S Kamiyama, T Aoyama, Y Tsutsumi, H Takada, A Horiuchi, T Maeda, K. Torii, H. Kitajima, T. Arikado
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  ABSTRACT: In this study, we used HfSiO_x with Hf concentration of 60% in order to obtain a EOT less than 1.5nm, and the influence of nitrogen concentration on the electrical properties was examined.
  Gate Insulator, 2003. IWGI 2003. Extended Abstracts of International Workshop on; 12/2003
• Conference Proceeding: Improved performance of FETs with HfAlO_x gate dielectrics using optimized poly-SiGe gate electrodes

  A. Muto, H. Ohji, T Kawahara, T Maeda, K. Torii, H. Kitajima
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  ABSTRACT: In this study, we investigated the growth manner of poly-Si/poly-SiGe layered films on HfAlO_x films with various Hf contents. The effect of the poly-SiGe gate electrode on FET performances was also evaluated.
  Gate Insulator, 2003. IWGI 2003. Extended Abstracts of International Workshop on; 12/2003
• Conference Proceeding: In-situ HfSiON/SiO₂ gate dielectric fabrication using hot wall batch system

  T Aoyama, S Kamiyama, Y Tamura, T Sasaki, R. Mitsuhashi, K. Torii, H. Kitajima, T. Arikado
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  ABSTRACT: In this paper, we propose the novel HfSiON fabrication process using hot wall batch system, metal organic chemical vapor deposition and post deposition annealing. Properties of FETs with the HfSiON gate dielectric formed by these novel processes are also reported.
  Gate Insulator, 2003. IWGI 2003. Extended Abstracts of International Workshop on; 12/2003