Publications (23)14.08 Total impact
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Article: A Radiation Hard Digital Monolithic Pixel Sensor for the EUDET-JRA1 Project
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ABSTRACT: In the framework of the EUDET-JRA1 project (European Detector R&D towards the International Linear Collider), which consists of design, realization and implantation of a high resolution beam digital telescope, based on Monolithic Active Pixel Sensors (MAPS), an intermediate digital chip sensor, MIMOSA22, has already been delivered with good detection performances. Although this intermediate chip has fulfilled all the initial requirements of the project, it was admitted that radiation tolerance behavior of the sensor could be improved, especially if the high precision telescope is used later in a hadron testbeam infrastructure. For this purpose, a new version of the sensor, MIMOSA22-BIS, has been designed, with several improved pixel architectures, and using the same AMS 0.35 μm opto process of the sensor MIMOSA22. This paper will be focused on tests performed in laboratory conditions using a <sup>55</sup>Fe source, and tests performed in CERN-SPS, using a 120 GeV pion beam, in order to characterize detection performances of the chip with MIPs, before and after ionizing irradiation.IEEE Transactions on Nuclear Science 09/2010; · 1.45 Impact Factor -
Conference Proceeding: Radiation tolerance study of a digital monolithic pixel sensor for the EUDET-JRA1 project
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ABSTRACT: In the framework of the EUDET-JRA1 project (European Detector R&D towards the International Linear Collider), which consists to design, realize and qualify a high resolution beam digital telescope, based on Monolithic Active Pixel Sensors (MAPS), an intermediate digital chip sensor, MIMOSA22, has already been delivered with good detection performances. Although this intermediate chip has fulfilled all the initial requirements of the project, it was admitted that radiation tolerance behavior of the sensor could be improved, especially if the high precision telescope is used later in a hadron testbeam infrastructure. For this purpose, a new version of the sensor, MIMOSA22-BIS, has been designed, with improvement of several pixel architectures, and using the same AMS 0.35 ¿m opto process of the sensor MIMOSA22. This paper will be focused on tests performed in laboratory, using a <sup>55</sup>Fe source, and tests performed in CERN-SPS, using a 120 GeV pion beam, in order to characterize detection performances of the chip with MIPs, before and after ionizing irradiation.Nuclear Science Symposium Conference Record (NSS/MIC), 2009 IEEE; 12/2009 -
Conference Proceeding: Thin, fully depleted monolithic active pixel sensor based on 3D integration of heterogeneous CMOS layers
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ABSTRACT: On the way towards fast, radiation tolerant and ultra thin CMOS radiation sensors, we propose new generation of devices based on commercial availability of vertical integration of several CMOS wafers (3D Electronics). In this process, each wafer may be thinned down to about 10 microns end equipped with through-silicon vias (TSV) allowing for electrical interconnection between wafers at a very small pitch (few microns) and with a minimum material budget. The proposed prototype device is a 245Ã245 pixel array with a pitch of 20 ¿m, providing active area of 5Ã5 mm2. In the first silicon layer charge sensing diode and first stage buffer amplifier (source follower) are integrated, using CMOS process on high resistivity epitaxial wafers. Outputs of buffer voltage amplifiers are vertically coupled (through a poly-poly capacitor) to the following stage of processing electronics (charge integration, time continuous shaping and signal discrimination), placed in the second silicon layer (0.13 micron CMOS). The third silicon layer (also 0.13 micron CMOS) is used for implementation of digital (binary) readout with a fast, data driven, self-triggering data flow. After description of the proposed 3D device, an update of results from ongoing tests with the first CMOS MAPS prototype fabricated using high-resistivity epitaxial substrate is provided.Nuclear Science Symposium Conference Record (NSS/MIC), 2009 IEEE; 12/2009 -
Conference Proceeding: First test results Of MIMOSA-26, a fast CMOS sensor with integrated zero suppression and digitized output
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ABSTRACT: The MIMOSA pixel sensors developed in Strasbourg have demonstrated attractive features for the detection of charged particles in high energy physics. So far, full-size sensors have been prototyped only with analog readout, which limits the output rate to about 1000 frames/second. The new MIMOSA 26 sensor provides a 2.2 cm<sup>2</sup> sensitive surface with an improved readout speed of 10,000 frames/second and data throughput compression. It incorporates pixel output discrimination for binary readout and zero suppression micro-circuits at the sensor periphery to stream only fired pixel out. The sensor is back from foundry since february 2009 and has being characterized in laboratory and in test beam. The temporal noise is measured around 13-14 e<sup>-</sup> and an operation point corresponding to an efficiency of 99.5±0.1 % for a fake rate of 10<sup>-4</sup> per pixel can be reached at room temperature. MIMOSA 26 equips the final version of the EUDET beam telescope and prefigures the architecture of monolithic active pixel sensors (MAPS) for coming vertex detectors (STAR, CBM and ILC experiments) which have higher requirements. Developments in the architecture and technology of the sensors are ongoing and should allow to match the desired readout speed and radiation tolerance. Finally, the integration of MAPS into a micro-vertex detector is addressed. A prototype ladder equipped, on both sides, with a row of 6 MIMOSA 26-like sensors is under study, aiming for a total material budget about 0.3% X<sub>0</sub>.Nuclear Science Symposium Conference Record (NSS/MIC), 2009 IEEE; 12/2009 -
Article: Intermediate Digital Monolithic Pixel Sensor for the EUDET High Resolution Beam Telescope
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ABSTRACT: A high resolution beam telescope, based on CMOS Monolithic Active Pixels Sensors (MAPS), is being developed under the EUDET collaboration, a coordinated detector R&D program for a future international linear collider. A very good spatial resolution < 5 mum, a fast readout time of 100 mus for the whole array (136 times 576 pixels) and a high granularity can be obtained with this technology. A recent fast MAPS chip, designed in AMS CMOS 0.35 mum Opto process with 14 mum epitaxial layer and called MIMOSA22, was submitted to foundry. MIMOSA22 has an active area of 26.5 mm<sup>2</sup> with a pixel pitch of 18.4 mum arranged in an array of 576 rows by 136 columns where 8 columns have analog test outputs and 128 have their outputs connected to offset compensated discriminator stages. The pixel array is divided in seventeen blocks of pixels, with different amplification gain, diode size, pixel architecture and is addressed row-wise through a serially programmable (JTAG) sequencer. Discriminators have a common adjustable threshold with internal DAC. MIMOSA22 is the last chip (IDC-Intermediate Digital Chip), before the final sensor of the EUDET-JRA1 beam telescope, which will be installed on the 6 GeV electron beam line at DESY. In this paper, laboratory test results on analog and digital parts are presented. Test beam results, obtained with a 120 GeV pion beam at CERN, are also presented. In the last part of the paper, results on irradiated chips are given.IEEE Transactions on Nuclear Science 07/2009; · 1.45 Impact Factor -
Article: CMOS pixel sensor development: a fast read-out architecture with integrated zero suppression
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ABSTRACT: CMOS Monolithic Active Pixel Sensors (MAPS) have demonstrated their strong potential for tracking devices, particularly for flavour tagging. They are foreseen to equip several vertex detectors and beam telescopes. Most applications require high read-out speed, which imposes sensors to feature digital output with integrated zero suppression. The most recent development of MAPS at IPHC and IRFU addressing this issue will be reviewed. The design architecture, combining pixel array, column-level discriminators and zero suppression circuits, will be presented. Each pixel features a preamplifier and a correlated double sampling (CDS) micro-circuit reducing the temporal and fixed pattern noises. The sensor is fully programmable and can be monitored. It will equip experimental apparatus starting data taking in 2009/2010.Journal of Instrumentation 04/2009; 4(04):P04012. · 1.87 Impact Factor -
Article: Development of Binary Readout CMOS Monolithic Sensors for MIP Tracking
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ABSTRACT: Recently, CMOS Monolithic Active Pixels Sensors (MAPS) have become strong candidates for pixel detectors used in high energy physics experiments. A very good spatial resolution lower than 5 mum can be obtained with these detectors. A recent fast MAPS chip, designed in AMS CMOS 0.35 mum Opto process and called MIMOSA16 (HiMAPS2), was submitted to foundry in June 2006. The chip is a 128times32 pixels array where 8 columns have analog test outputs and 24 columns have their outputs connected to offset compensated discriminator stages. The pixel array is addressed row-wise. The array is divided in four blocks of pixels with different charge-to-voltage conversion factors and is controlled by a serially programmable sequencer. The sequencer operates as a pattern generator which delivers control signals both to the pixels and to the column-level discriminators. Discriminators have a common adjustable threshold. This chip is the basis of the final sensor of the EUDET-JRA1 beam telescope which will be installed at DESY in 2009. In this paper, laboratory tests results using a <sup>55</sup>Fe source together with beam tests results obtained at CERN using Minimum Ionizing Particles (MIPs) are presented.IEEE Transactions on Nuclear Science 03/2009; · 1.45 Impact Factor -
Conference Proceeding: Intermediate digital chip sensor for the EUDET-JRA1 high resolution beam telescope
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ABSTRACT: A high resolution beam telescope, based on CMOS Monolithic Active Pixels Sensors (MAPS), is being developed within the EUDET collaboration, a coordinated detector R&D program for a future international linear collider. A very good spatial resolution ≪ 5 μm, a fast readout time of 100 μs for whole array and a high granularity can be obtained with this technology. A recent fast MAPS chip, designed on AMS CMOS 0.35 μm Opto process and called MIMOSA22, was submitted to foundry in October 2007. MIMOSA22 has an active area of 26.5 mm<sup>2</sup> with a pixel pitch of 18.4 μm arranged in an array of 576 rows by 136 columns where 8 columns have analog test outputs and 128 have their outputs connected to offset compensated discriminator stages. The pixel array is divided in seventeen blocks of pixels, with different amplification gain, diode size, pixel architecture and is addressed row-wise through a serially programmable (JTAG) sequencer. The sequencer operates as a pattern generator which delivers control signals both to the pixels and to the column-level discriminators. Discriminators have a common adjustable threshold, with internal DAC, controlled by the JTAG. MIMOSA22 is the last chip (IDC-Intermediate Digital Chip), before the final sensor of the EUDET-JRA1 beam telescope, which will be installed at the 6 GeV electron beam line at DESY in spring 2009. In this paper, laboratory tests results on analog and digital parts are presented. For this purpose, a <sup>55</sup>Fe source is used for calibration of pixels. Test beam results, obtained with a 120 GeV pions beam at CERN in summer 2008, are also presented. In the last part of the paper, a new chip MIMOSA22-bis, with radiation tolerant pixel architectures (evolution of MIMOSA22) will be discussed.Nuclear Science Symposium Conference Record, 2008. NSS '08. IEEE; 11/2008 -
Article: Performance of a Fast Binary Readout CMOS Active Pixel Sensor Chip Designed for Charged Particle Detection
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ABSTRACT: We report on the performance of the MIMOSA8 (HiMAPS1) chip. The chip is a 128times32 pixels array where 24 columns have discriminated binary outputs and eight columns analog test outputs. Offset correction techniques are used extensively in this chip to overcome process related mismatches. The array is divided in four blocks of pixels with different conversion factors and is controlled by a serially programmable sequencer. MIMOSA8 is a representative of the CMOS sensors development option considered as a promising candidate for the Vertex Detector of the future International Linear Collider (ILC). The readout technique, implemented on the chip, combines high spatial resolution capabilities with high processing readout speed. Data acquisition, providing control of the chip and signal buffering and linked to a VME system, was made on the eight analog outputs. Analog data, without and with a <sup>55</sup>Fe X-ray source, were acquired and processed using off-line analysis software. From the reconstruction of pixel clusters, built around a central pixel, we deduce that the charge spread is limited to the closest 25 pixels and almost all the available charge is collected. The position of the total charge collection peak (and subsequently the charge-to-voltage conversion factor) stays unaffected when the clock frequency is increased even up to 150 MHz (13.6 mus readout time per frame). The discriminators, placed in the readout chain, have proved to be fully functional. Beam tests have been made with high energy electrons at DESY (Germany) to study detection efficiency. The results prove that MIMOSA8 is the first and fastest successful monolithic active pixel sensor with on-chip signal discrimination for detection of MIPsIEEE Transactions on Nuclear Science 01/2007; · 1.45 Impact Factor -
Article: A fast monolithic active pixel sensor with pixel-level reset noise suppression and binary outputs for charged particle detection
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ABSTRACT: In order to develop precision vertex detectors for the future linear collider, fast monolithic active pixel sensors are studied. A standard CMOS 0.25 mum digital process is used to design a test chip which includes different pixel types, column-level discriminators, and a fully programmable digital sequencer. In-pixel amplification is implemented together with double sampling. Different charge-to-voltage conversion factors were obtained using amplifiers with different gains or diode sizes. Pixel architectures with dc and ac coupling to charge sensing element were proposed. Hits from conversion of <sup>55</sup>Fe photons were recorded for the dc-coupled and ac-coupled pixel versions. Double sampling is functional and allows almost a complete cancellation of fixed pattern noiseIEEE Transactions on Nuclear Science 01/2006; · 1.45 Impact Factor -
Conference Proceeding: Performance of a fast programmable active pixel sensor chip designed for charged particle detection
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ABSTRACT: We report on the performance of the MIMOSA8 chip. The chip is a 128×32 pixels array where 8 columns have analog direct outputs and 24 have discriminated outputs. The array is divided in four blocks of pixels with different conversion factors and is controlled by a serially programmable sequencer. MIMOSA8 is a representative of the CMOS sensors development option considered as a promising candidate for the vertex detector of the future International Linear Collider (ILC). The readout technique, implemented on the chip, combines high spatial resolution capabilities with high processing readout speed. Data acquisition, providing control of the chip and signal buffering and linked to a VME system, was made on the 8 analog outputs. Analog data, without and with a <sup>55</sup>Fe X-ray source, were acquired and processed using off-line analysis software. From the reconstruction of pixel clusters, built around a central pixel, we deduce that the charge spread is limited to the closest 25 pixels and almost all the available charge is collected. The position of the total charge collection peak (and subsequently the charge-to-voltage conversion factor) stays unaffected when the clocking frequency is increased even up to 150 MHz (13.6 μs readout time per frame). The discriminators, placed in the readout chain, have proved to be fully functional. Beam tests have been made with high energy electrons at DESY (Germany) to study detection efficiency.Nuclear Science Symposium Conference Record, 2005 IEEE; 11/2005 -
Conference Proceeding: A fast monolithic active pixel sensor with pixel-level reset noise suppression and binary outputs for charged particle detection
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ABSTRACT: In order to develop precision vertex detectors for the future linear collider, fast monolithic active pixel sensors are studied. Standard CMOS 0.25 μm digital process is used to design a test chip which includes different pixel types, column-level discriminators and a digital control part. In-pixel amplification is implemented together with double sampling. Different charge-to-voltage conversion factors were obtained using amplifiers with different gains or diode sizes. Pixel architectures with DC and AC coupling to charge sensing element were proposed. As far, hits from conversion of <sup>55</sup>Fe photons were registered for the DC-coupled pixel. Double sampling is functional and allows almost a complete cancellation of fixed pattern noise.Nuclear Science Symposium Conference Record, 2004 IEEE; 11/2004 -
Article: Monolithic active pixel sensors with in-pixel double sampling operation and column-level discrimination
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ABSTRACT: Monolithic active pixel sensors constitute a viable alternative to hybrid pixel sensors and charge coupled devices for the next generation of vertex detectors. Possible applications will strongly depend on a successful implementation of on-chip hit recognition and sparsification schemes. The task is tough, first because of very small signal amplitudes (∼ mV), which are of the same order of magnitude as natural dispersions in the transistor threshold voltages, secondly because of the limitation to use only one type of transistor over the sensitive area. This paper presents a 30×128 pixel prototype chip, featuring fast, column parallel signal processing. The pixel concept combines in-pixel amplification with double sampling operation. The pixel output is a differential current signal proportional to the difference between the reference level and the charge collected. The readout of the pixel is two-phase, matching discrimination circuitry implemented at the end of each column. Low-noise discriminators feature autozero functionality. The details of the chip design are presented. Difficulties, encountered in the first attempt to address on-line hit recognition, are reported. Performances of the pixel and discriminator blocks, determined in separate measurements, are discussed. An important part of this paper consists of results of first tests performed with soft X-rays from a <sup>55</sup>Fe source.IEEE Transactions on Nuclear Science 11/2004; · 1.45 Impact Factor -
Conference Proceeding: Monolithic active pixel sensors with in-pixel double sampling operation and column-level discrimination
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ABSTRACT: Monolithic Active Pixel Sensors constitute a viable alternative to Hybrid Pixel Sensors and Charge Coupled Devices for the next generation of vertex detectors. Possible application will strongly depend on a successful implementation of on-chip hit recognition and sparsification schemes. These are not a trivial task, first because of very small signal amplitudes (∼mV), originated from charge collection, which are of the same order as natural dispersions in a CMOS process, secondly because of the limitation to use only one type of transistor over the sensitive area. The paper presents a 30 × 128 pixel prototype chip, featuring fast, column parallel signal processing. The pixel concept combines on-pixel amplification with double sampling operation. The pixel output is a differential current signal proportional to the difference between the charges collected in two consecutive time slots. The readout of the pixel is two-phase, matching signal discrimination circuitry implemented at the end of each column. The design of low-noise discriminators includes automatic compensation of offsets for individual pixels. The details of the chip design are presented. Difficulties, encountered from being the first attempt to address on-line hit recognition, are reported. Performances of the pixel and discriminator blocks, determined in separate measurements, are discussed. The essential part of the paper consists of results of first tests performed with soft X-rays from a <sup>55</sup>Fe source.Nuclear Science Symposium Conference Record, 2003 IEEE; 11/2003 -
Article: Low-power autozeroed high-speed comparator for the readout chain of a CMOS monolithic active pixel sensor based vertex detector
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ABSTRACT: Future high energy physics experiments will require the development of a linear collider in the TeV region such as TESLA. Because of physics requirements it will be necessary to make precision vertex measurements. This makes a high-resolution vertex detector an essential part of the detecting system. One of the possibilities is to develop a CMOS monolithic active pixel sensors (MAPS) based detector. A planned prototype chip for the TESLA developments would include an array of identical pixels with their addressing circuits, signal processing within the chip, data sparsification, and analogue to digital conversion. For this purpose we have developed a column-based, low power, fully offset compensated multistage comparator (discriminator) to read out the active pixels. For one of the versions implemented, a resolution better than 1 mV was obtained at operating speeds higher than 10 MHz. The power dissipation is of the order of 200 μW. A test chip was designed on a 0.35 μm CMOS process from AMI Semiconductor. As the pixel pitch is only 28 μm, the dimensions of the comparator are 300 μm×28 μm. This design is compatible with the clocking scheme of the pixel array.IEEE Transactions on Nuclear Science 11/2003; · 1.45 Impact Factor -
Article: Monolithic Active Pixel Sensors with In-pixel Double Sampling Operation and Column-level Discrimination
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Article: CMOS Pixel Sensors for High Precision Beam Telescopes and Vertex Detectors
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ABSTRACT: CMOS sensors of the MIMOSA series are developed at IPHC since a decade and have ended up with full scale devices used in beam telescopes and in demonstrators of future vertex detectors. Since a few years, a fast architecture is being developed in collaboration with IRFU, which aims to speed up the read-out by 1-2 orders of magnitude. The first full scale sensor based on this archi-tecture was fabricated recently and is being tested. Made of ∼660,000 pixels covering an active area of ∼2 cm 2 , it delivers zero-suppressed binary signals, which allow running at ∼10 kframes/s. It equips the beam telescope of the E.U. project EUDET and serves as a forerunner of the sensor equipping the 2 layers of the Heavy Flavor Tracker detector of the STAR experiment at RHIC. This paper overviews the main features and test results of this pioneering sensor. Finally, the issue of radiation tolerance will be addressed, in the context of a newly available CMOS process using a depleted substrate. A prototype sensor was fabricated in this process. First results indicate that fluences of 10 14 n eq /cm 2 may be tolerable for CMOS sensors. Overall, the paper provides an overview of the status and plans of CMOS pixel sensors at the frontier of their achievements and outreach.European Physical Society Europhysics Conference on High Energy Physics. 08/2002; -
Article: Studies for a 10μs, thin, high resolution CMOS pixel sensor for future vertex detectors
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ABSTRACT: Future high energy physics (HEP) experiments require detectors with unprecedented performances for track and vertex reconstruction. These requirements call for high precision sensors, with low material budget and short integration time. The development of CMOS sensors for HEP applications was initiated at IPHC Strasbourg more than 10 years ago, motivated by the needs for vertex detectors at the International Linear Collider (ILC) [R. Turchetta et al, NIM A 458 (2001) 677]. Since then several other applications emerged. The first real scale digital CMOS sensor MIMOSA26 equips Flavour Tracker at RHIC, as well as for the microvertex detector of the CBM experiment at FAIR. MIMOSA sensors may also offer attractive performances for the ALICE upgrade at LHC. This paper will demonstrate the substantial performance improvement of CMOS sensors based on a high resistivity epitaxial layer. First studies for integrating the sensors into a detector system will be addressed and finally the way to go to a 10μs readout sensor will be discussed.Nuclear Physics B - Proceedings Supplements 215(1):48-50. · 0.88 Impact Factor -
Article: A fast monolithic active pixel sensor with pixel level reset noise suppression and binary outputs for charged particle detection
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ABSTRACT: In order to develop precision vertex detectors for the future linear collider, fast active monolithic active pixel sensors are studied. Standard CMOS 0.25 mum digital process is used to design a test chip which includes different pixel types, column-level discriminators and a digital control part. In-pixel amplification is implemented together with double sampling. Different charge-to-voltage conversion factors were obtained using amplifiers with different gains or diode sizes. Pixel architectures with DC and AC coupling to charge sensing element were proposed. As far, hits from conversion of 35Fe photons were registered for the DC-coupled pixel. Double sampling is functional and allows almost a complete cancellation if fixed pattern noise. -
Conference Proceeding: Development of binary readout CMOS monolithic sensors for MIP tracking
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ABSTRACT: Recently, CMOS monolithic active pixels sensors (MAPS) have become strong candidates for pixel detectors used in high energy physics experiments. A very good spatial resolution can be obtained with these detectors (lower than 5 microns). A recent fast MAPS chip, designed on AMS CMOS 0.35 mum Opto process and called MIMOSA16 (HiMAPS2), was submitted to foundry in June 2006. The pixel array is addressed row-wise. The chip is a 128 times 32 pixels array where 8 columns have analog test outputs and 24 have their outputs connected to offset compensated discriminator stages. The array is divided in four blocks of pixels with different conversion factors and is controlled by a serially programmable sequencer. Discriminators have a common adjustable threshold. The sequencer operates as a pattern generator which delivers control signals both to the pixels and to the column-level discriminators. This chip is the basis of the final sensor of the EUDET-JRA1 beam telescope which will be installed at DESY in 2009. In this paper, laboratory tests results using a <sup>55</sup>Fe source together with beam tests results made at CERN using minimum ionizing particles (MIPs) are presented.Nuclear Science Symposium Conference Record, 2007. NSS '07. IEEE;
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2009
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Université de Strasbourg
- Institut Pluridisciplinaire Hubert Curien (IPHC)
Strasbourg, Alsace, France
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