R. Tao

Universität Stuttgart, Stuttgart, Baden-Wuerttemberg, Germany

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Publications (13)3.86 Total impact

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    Conference Proceeding: A 2 GHz CMOS dB-linear programmable-gain amplifier with 51 dB dynamic range
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    ABSTRACT: A 2 GHz programmable-gain amplifier (PGA) using 0.12-μm CMOS technology is presented in this paper, which has a 51 dB gain control range with 3 dB gain control steps. The maximum output power of this PGA achieves 9 dBm while the 1-dB compression point is located at 8 dBm. A high linearity denoted by the oIP3 of 22 dBm at the maximum gain has been achieved. A new configuration to digitally implement a dB-linear gain characteristic is demonstrated in this paper, which simultaneously enables an adaptive power consumption.
    Microwave Conference, 2005 European; 11/2005
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    Article: Low-noise amplifier in 0.12 μm standard CMOS technology for K-band
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    ABSTRACT: A K-band CMOS low-noise amplifier with a noise figure of 4.26 dB and a peak gain of 18.86 dB is presented. The low-noise amplifier has a peak gain frequency of 20.3 GHz and an input referred 1 dB compression point of -16 dBm. These are believed to be the lowest noise figure and highest gain values reported to date at these frequencies in a standard CMOS technology.
    Electronics Letters 06/2005; · 0.96 Impact Factor
  • Article: Low power 10 GHz ring VCO using source capacitively coupled current amplifier in 0.12 μm CMOS technology
    R. Tao, M. Berroth
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    ABSTRACT: A 10 GHz ring voltage controlled oscillator (VCO) has been designed and implemented in 0.12 μm CMOS technology. A source capacitively coupled current amplifier (SC3A) is adopted to realise this VCO. It can operate from 8.4 GHz up to 10.6 GHz with a phase noise of about -85 dBc/Hz at 1 MHz frequency offset. With the 1.5 V supply voltage, the current consumption is about 35 mA.
    Electronics Letters 12/2004; · 0.96 Impact Factor
  • Conference Proceeding: Source capacitively coupled compensation technique and its applications
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    ABSTRACT: This paper gives the first detailed analyses and derivations of the source capacitively coupled compensation technique. The applications of its useful bandpass and phase-lead features, such as high frequency amplitude compensation amplifier, positive feedback ring oscillator and phase-lead compensation ring oscillator are presented. With this compensation technique the amplifier shows significant bandwidth improvement. The constructed 5 GHz positive feedback (PFB) ring oscillator represents 2-9 dB noise-power product advantage below 10 MHz frequency offset. The compensated negative feedback (NFB) ring oscillator prototype in 0.18 μm CMOS process achieves record 10 GHz oscillation frequency.
    Electron Devices for Microwave and Optoelectronic Applications, 2004. EDMO 2004. 12th International Symposium on; 12/2004
  • Conference Proceeding: The integrated 2W high voltage/high power 0. 12-μm RF CMOS power amplifier
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    ABSTRACT: Not Available
    Microwave Conference, 2004. 34th European; 11/2004
  • Conference Proceeding: Wide-band low-power CMOS transimpedance preamplifier
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    ABSTRACT: A wide bandwidth, low power consumption transimpedance preamplifier has been designed and implemented in 0.18 μm standard digital CMOS technology. A circuit topology with two gain stages is used to provide increased open-loop gain compared to a single stage design, and greater close-loop stability than a three-stage amplifier. The preamplifier has a transimpedance of 56 dBΩ with the bandwidth of 2.5 GHz, and can operate at 2.5 Gb/s with the dynamic range from 15 μA up to 1.5 mA. The power consumption is only 15 mW using 1.8 V power supply.
    Microwave Symposium Digest, 2004 IEEE MTT-S International; 07/2004
  • Article: Monolithically integrated CMOS current-mode transimpedance
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    ABSTRACT: A wideband low-power current-mode transimpedance amplifier
    Electronics Letters 01/2004; 39(25):1772- 1774. · 0.96 Impact Factor
  • Article: Low power 10 Gbit/s VCSEL driver for optical interconnect
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    ABSTRACT: A monolithically integrated 10 Gbit/s VCSEL driver has been realised using standard 0.18 μm CMOS technology. An open drain structure is used to provide the higher current output in low supply voltage condition. With 1.8 V supply voltage, the output voltage on 50 Ω load is 900 mV<sub>p-p</sub>, corresponding to the output current of 18 mA, the total power consumption is only 25 mA.
    Electronics Letters 12/2003; · 0.96 Impact Factor
  • Conference Proceeding: Wide-band low-power CMOS current mode transimpedance preamplifier
    R. Tao, M. Berroth
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    ABSTRACT: A wide-band low-power current mode transimpedance amplifier has been designed and implemented in 0.18μm standard digital CMOS technology. Current shunt feedback technology is used to provide low input impedance and broaden the bandwidth. This current mode common gate preamplifier has a transimpedance 60 dBΩ with the bandwidth of 3.2 GHz, and can operate at 5 Gb/s with large dynamic range. The power consumption is only 15mW.
    Electron Devices for Microwave and Optoelectronic Applications, 2003. EDMO 2003. The 11th IEEE International Symposium on; 12/2003
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    Conference Proceeding: A 10Gb/s fully differential CMOS transimpedance preamplifier
    R. Tao, M. Berroth
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    ABSTRACT: A high speed, low noise fully differential transimpedance amplifier has been designed and implemented in 0.18 μm standard digital CMOS technology. The parallel feedback circuit topology is adopted to broaden the bandwidth. This preamplifier has a power gain S21 of 22 dB with the bandwidth of 6GHz, and can operate at 10 Gb/s with dynamic range from 2.5μA up to 2.5 mA. The power consumption is only 88 mW.
    Solid-State Circuits Conference, 2003. ESSCIRC '03. Proceedings of the 29th European; 10/2003
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    Conference Proceeding: 10 Gb/s CMOS limiting amplifier for optical links
    R. Tao, M. Berroth
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    ABSTRACT: A 10 Gb/s limiting amplifier was designed, fabricated and tested using an industrial digital 0.18 μm CMOS process. The parallel feedback circuit topology is adopted to broaden the bandwidth. With the supply voltage of 2.4 V, this limiting amplifier can operate at 10 Gb/s at a dynamic range from 25 mV up to 250 mV. The power consumption is 120 mW.
    Solid-State Circuits Conference, 2003. ESSCIRC '03. Proceedings of the 29th European; 10/2003
  • Conference Proceeding: The design of 5 GHz voltage controlled ring oscillator using source capacitively coupled current amplifier
    R. Tao, M. Berroth
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    ABSTRACT: A 5 GHz voltage controlled ring-oscillator (VCO) has been designed using 0.18 μm CMOS technology. Source Capacitively Coupled Current Amplifier (SC3A) is adopted to realize this VCO. Because of the band-pass characteristic of the SC3A, this VCO exhibits the low noise performance with a large tuning range. It can operate from 4.3 GHz up to 6.1 GHz with a phase noise of about -85 dBc/Hz at 1 MHz frequency offset. For the 2 V supply voltage, the power consumption is about 80 mW.
    Radio Frequency Integrated Circuits (RFIC) Symposium, 2003 IEEE; 07/2003
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    Article: The Integrated 2W High Voltage/High Power 0.12-µm RF CMOS Power Amplifier
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    ABSTRACT: A 2W HiVP power amplifier for GSM mobile communication system is designed using 0.12-µm CMOS process. To solve the problem of low breakdown voltage in deep-submicron CMOS technology, the new High Voltage/High Power (HiVP) device configuration is used. With HiVP configuration, a large voltage can be divided by several devices, so that the voltage drop on each device is reduced. Hence the low-cost CMOS technology can be adopted for the design of power amplifier which will be used in a mobile phone. In this paper, an analytical overview of theory and practice of the HiVP power amplifier are discussed.

Institutions

  • 2003–2005
    • Universität Stuttgart
      • Institute of Electrical and Optical Communication Engineering
      Stuttgart, Baden-Wuerttemberg, Germany