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ABSTRACT: BAE Systems, under contract to the US Air Force Research Labs, has been developing a 4Mb Non-Volatile Chalcogenide Random Access Memory (C-RAM¿) optimized for the radiation environments encountered in spacecraft applications. C-RAM is a phase change memory with a unique combination of features that collectively provide a high-density, low-power, non-volatile memory solution that is radiation hardened and meets rigorous reliability requirements. The device is now undergoing QML qualification in preparation for being flight production ready in early 2009. Flight qualified C- RAM will serve the critical need for rad hard non-volatile RAM in strategic space and military applications. Initial space radiation effects testing (heavy ion induced upset rates) demonstrate the robust nature of the device. No memory cell upsets were recorded and the majority of the observed upsets were soft errors (SE) induced in the sense amp circuits which are easily correctable with common error correcting code (ECC) algorithms. During the product development phase potential failure mechanisms associated with phase change memories such as proximity disturbs and drill-in effects were evaluated to determine whether they were legitimate concerns for C-RAM. These tests and other tests involving second order radiation effects, such as the effect of heavy ion radiation exposure on data retention lifetime were conducted. The results of these investigations further demonstrate the full capacity of the product technology. This paper will describe the C-RAM design and operation, and the results of the test and characterization of C-RAM devices.
Non-Volatile Memory Technology Symposium, 2008. NVMTS 2008. 9th Annual; 12/2008
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ABSTRACT: We report on the progress of a recent addition to non-volatile solid state memory technologies suited for space and other ionizing radiation environments. We summarize the material and processing science behind the current generation of chalcogenide phase-change memories fabricated on CMOS structures. The chalcogenide material used for phase-change applications in rewritable optical storage (Ge<sub>2</sub>Sb<sub>2</sub>Te<sub>5</sub>) has been integrated with a radiation hardened CMOS process to produce 64 kbit memory arrays. On selected arrays electrical testing demonstrated up to 100% memory cell yield, 100 ns programming and read speeds, and write currents as low as 1 mA/bit. Devices functioned normally from -55°C to 125°C. Write/read endurance has been demonstrated to 1×10<sup>8</sup> before first bit failure. Radiation results show no degradation to the hardened CMOS or effects that can be attributed to the phase-change material. Future applications of the technology are discussed.
Aerospace Conference, 2004. Proceedings. 2004 IEEE; 04/2004
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ABSTRACT: We report on the progress of a recent addition to non‐volatile solid state memory technologies suited for space and other ionizing radiation environments. We summarize the material and processing science behind the current generation of chalcogenide phase‐change memories fabricated on CMOS structures. The chalcogenide material used for phase‐change applications in rewritable optical storage (Ge2Sb2Te5) has been integrated with a radiation hardened CMOS process to produce 64kbit memory arrays. On selected arrays electrical testing demonstrated up to 100% memory cell yield, 100ns programming and read speeds, and write currents as low as 1mA/bit. Devices functioned normally from − 55°C to 125°C. Write/read endurance has been demonstrated to 1 × 108 before first bit failure. Radiation results show no degradation to the hardened CMOS or effects that can be attributed to the phase‐change material. Future applications of the technology are discussed. © 2004 American Institute of Physics
AIP Conference Proceedings. 02/2004; 699(1):639-649.
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Aerospace Conference, 2003. Proceedings. 2003 IEEE; 02/2003
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ABSTRACT: The chalcogenide material used for phase-change applications in rewritable optical storage (Ge 2 Sb 2 Te 5) has been integrated with a 0.5µm radiation hardened CMOS process to produce 64kbit memory arrays. On selected arrays electrical testing demonstrated up to 100% memory cell yield, 100ns programming and read speeds, and write currents as low as 1mA/bit. Devices functioned normally from -55°C to 125°C. Write/read endurance has been demonstrated to 1 × 10 8 before first bit failure. Total ionizing dose (TID) testing to 2Mrad(Si) showed no degradation of chalcogenide memory element. SEE testing showed no latch-up or single event gate rupture (SEGR) to an LET EFF of 123MeV/mg/cm 2 . Radiation results show no degradation to the hardened CMOS or effects that can be attributed to the phase-change material. Future applications of the technology are discussed.
