Block copolymer mediated deposition of metal nanoparticles on germanium nanowires.
Department of Chemistry, and National Institute for Nanotechnology, University of Alberta, Edmonton, AB, Canada.Chemical Communications (impact factor: 6.17). 04/2007; DOI:10.1039/b616883c pp.1438-40
ABSTRACT Galvanic displacement, mediated by a diblock copolymer, leads to deposition of well dispersed gold and silver nanoparticles on germanium nanowires.
Article: Lithographically patterned nanowire electrodeposition: a method for patterning electrically continuous metal nanowires on dielectrics.[show abstract] [hide abstract]
ABSTRACT: Lithographically patterned nanowire electrodeposition (LPNE) is a new method for fabricating polycrystalline metal nanowires using electrodeposition. In LPNE, a sacrificial metal (M(1)=silver or nickel) layer, 5-100 nm in thickness, is first vapor deposited onto a glass, oxidized silicon, or Kapton polymer film. A (+) photoresist (PR) layer is then deposited, photopatterned, and the exposed Ag or Ni is removed by wet etching. The etching duration is adjusted to produce an undercut approximately 300 nm in width at the edges of the exposed PR. This undercut produces a horizontal trench with a precisely defined height equal to the thickness of the M(1) layer. Within this trench, a nanowire of metal M(2) is electrodeposited (M(2)=gold, platinum, palladium, or bismuth). Finally the PR layer and M(1) layer are removed. The nanowire height and width can be independently controlled down to minimum dimensions of 5 nm (h) and 11 nm (w), for example, in the case of platinum. These nanowires can be 1 cm in total length. We measure the temperature-dependent resistance of 100 microm sections of Au and Pd wires in order to estimate an electrical grain size for comparison with measurements by X-ray diffraction and transmission electron microscopy. Nanowire arrays can be postpatterned to produce two-dimensional arrays of nanorods. Nanowire patterns can also be overlaid one on top of another by repeating the LPNE process twice in succession to produce, for example, arrays of low-impedance, nanowire-nanowire junctions.ACS Nano 10/2008; 2(9):1939-49. · 10.77 Impact Factor
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ABSTRACT: This work focuses on the synthesis and interfacial characterization of gold nanostructures on silicon surfaces, including Si(111), Si(100), and Si nanowires. The synthetic approach uses galvanic displacement, a type of electroless deposition that takes place in an efficient manner under aqueous, room-temperature conditions. The case of gold-on-silicon has been widely studied and used for several applications and yet, a number of important, fundamental questions remain as to the nature of the interface. Some studies are suggestive of heteroepitaxial growth of gold on the silicon surface, whereas others point to the existence of a silicon-gold intermetallic sandwiched between the metallic gold and the underlying silicon substrate. Through detailed high resolution transmission electron microscopy (TEM), combined with selected area electron diffraction (SAED) and nanobeam diffraction (NBD), heteroepitaxial gold that is grown by galvanic displacement is confirmed on both Si(100) and Si(111), as well as silicon nanowires. The coincident site lattice (CSL) of gold-on-silicon results in a very small 0.2% lattice mismatch due to the coincidence of four gold lattices to three of silicon. The presence of gold-silicon intermetallics is suggested by the appearance of additional spots in the electron diffraction data. The gold-silicon interfaces appear heterogeneous with distinct areas of heteroepitaxial gold on silicon, and others, less well-defined, where intermetallics may reside. The high resolution cross-sectional TEM images reveal a roughened silicon interface under these aqueous galvanic displacement conditions, which most likely promotes nucleation of metallic gold islands that merge over time: a Volmer-Weber growth mechanism in the initial stages.ACS Nano 09/2009; 3(9):2809-17. · 10.77 Impact Factor
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