MOCHA, MOdelling and CHAracterization for SiP -Signal and Power Integrity Analysis
ABSTRACT This paper describes the research activity that is being carried out in the MOCHA project, a cooperative R&D effort at the European scale. The aim of the project is to develop reliable modelling and simulation solutions for SiP design verification.
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ABSTRACT: This paper presents a comparative overview of the most important approaches presented to address the behavioral modeling of microwave and wireless power amplifiers (PAs). Starting from a theoretical framework of recursive and nonrecursive nonlinear filters, it proposes a classification of the various PA behavioral models, discussing their abilities to represent the different effects observed in practical circuits. Using that formal procedure, one explains how it was possible to integrate a wide range of behavioral modeling activities and to show that some of them, which at first glance seemed to be quite different, are, indeed, identical in their modeling capabilities.IEEE Transactions on Microwave Theory and Techniques 05/2005; · 2.23 Impact Factor
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ABSTRACT: This paper shows a method to characterize microwave circuits using a near-field scanning microscope. Applied on various samples, it shows good resolution and weak disturbance for ICs operating with very common microwave components. Here, it is applied in an industrial surrounding to characterize the Bluetooth CMOS power amplifier. © 2004 Wiley Periodicals, Inc. Microwave Opt Technol Lett 41: 209–213, 2004; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.20096Microwave and Optical Technology Letters 05/2004; 41(3):209 - 213. · 0.59 Impact Factor
MOCHA, MOdelling and CHAracterization for SiP – Signal and Power Integrity Analysis
A. Girardi1, A. Conci1, R. Izzi1, T. Lessio1, F.G. Canavero2, I.S. Stievano2, H. Dudek3, D. Hardisty3, M. Tarantini3,
M. Dieudonne4, J. Van Hese4, T.R. Cunha5, J.C. Pedro5, C. Gaquière6, N. Vellas6
1STMicroelectronics M6 SRL, Italy; 2Politecnico di Torino, Italy; 3Cadence Design Systems Gmbh, Germany; 4Agilent
Technologies Belgium NV, Belgium; 5Instituto de Telecomunicações - Universidade de Aveiro, Portugal; 6Microwave
Characterization Center, France.
This paper describes the research activity that is being
carried out in the MOCHA project, a cooperative R&D effort
at the European scale. The aim of the project is to develop
reliable modelling and simulation solutions for SiP design
In the last years, the complexity, speed, and packaging
density of electronic systems have grown so fast that they
created a completely new design scenario. In order to
illustrate these issues, it is useful to consider the evolution of
portable devices as an example. These consumer goods are
integrating an increasing number of sophisticate and
heterogeneous functions, such as GPS, video cameras and
MP3. This evolution is driving the development of new 3D
packages holding and connecting the subsystems for the
digital and radiofrequency parts, new miniaturized ultra
wideband interconnect and very large capacity memory
modules. This application is evolving toward a System-in-
Package (SiP) or a System-on-Package (SoP) configuration
(See Fig.1) and is causing a revolution in the capabilities of
electronic systems, as well as in the design needs.
The key features of this revolution are the increase of
system complexity, the development of new dense 3D
packaging structures and the increase of signalling rates.
Complexity means that designers have to take a system
simulation approach, in order to assure that the individual
subsystems work properly and interact with each other as
expected. Dense 3D packaging structures imply a package
centric design approach. Till recently, package structures were
simply providing the link between the integrated circuit (IC)
and board domains, where designs were carried out
independently. In the new scenario, the package strictly
relates chips and boards, influencing the overall system
operation. Faster signalling creates a bundle of new modelling
problems, because it introduces new devices and increases the
impact of parasitic effects on existing components.
Within this scenario it is strategic to analyze and detect
potential signal and power integrity failures before the
prototype phase. The key to success is a set of integrated EDA
tools and modelling flows that combine the availability of
accurate models with fast and reliable time-domain and
Current EDA tools hardly address these issues, as there is a
large gap between the IC tools and the layout tools for
packages and boards.
The aim of this project is to develop reliable modeling and
simulation solutions for SiP design and verification through
measurement analysis, thus validating the simulation results
and making available characterization measurement platforms.
At the end of the project it is expected that the flows for
extracting accurate simulation models will be available,
together with a performing integrated EDA platform and a
viable signal integrity measurement methodology. The final
targets of project include:
- a demonstration of the innovative IC simulation models
developed and their related extraction flows by both
simulation and measurement;
- the development of an innovative 3D EM field solver;
- the development of a performing SiP design and
verification EDA platform;
- a demonstration of the developed signal integrity
The current modeling solutions and EDA tools used for
SiP design and verification have been derived from the board
applications, as natural evolution due to the fact that a SiP is a
sort of small board. Nevertheless, some technological
differences, like SiP’s 3D structures (wire bonds, solder balls,
die bumps) and non-ideal reference planes, make useless or
not accurate the classical IC buffers models and 2D
interconnection models valid for board design and
verification. As a result, the MOCHA research activity
addresses the technical challenges covering all the issues from
simulation models development (for IC buffers and power
supply networks and for 3D physical structures) to SiP power
and signal integrity verification methodologies by both
simulation and measurement approaches.
Description of the Work
The MOCHA project work plan is organized into four
major work packages (WP), which logically define the
different fields that have to be addressed in order to achieve
the expected technical goals. The WP sequence has been
defined in such a way that the different activities are initially
developed separately, interact with each other where needed,
and are later merged together for the implementation of
reliable simulation and measurement design verification
platforms. A brief description of the work packages follows:
- IC power integrity model: Main objective is the
identification of a suitable measurement methodology
for modelling IC power supply distribution networks,
overcoming the current limit of EDA tools to extract a
reliable wide-frequency-range model. To this aim,
both electromagnetic (EM) simulations and
978-1-4244-2318-7/08/$25.00 ©2008 IEEESPI 2008
measurements will be carried out, allowing to
generate accurate models that can be effectively used
to study the trade-off between power rails topology,
buffers configuration, pads distribution and accuracy
IC buffers’ innovative modelling approach: Main
objective is to explore an innovative approach for
parametric modelling of IC buffers, which may be
suitable for both simulation and measurement
characterization. To this aim, a benchmarking
between measurements and simulations will be
continuously carried out to accomplish the target
SiP design and verification EDA platform: Main
objective is the development of an EDA platform for
carrying out reliable signal and power integrity
analysis in the context of SiP design and verification,
to enable a reduction
design/manufacturing cycle. A new 3D EM field
solver for 3D physical structures characterization will
also be developed along with an interface that
enables the interfacing between the 3D EM field
solver and the EDA Platform .
SiP signal integrity measurement platform: Main
objective is to identify a viable technique for SiP
signal integrity measurements, in order to observe and
analyze the electrical behavior of internal package
signals when SiP is working on a real application
board. Within this work package, RF measurements
will also be carried out for validating the simulation
results of the 3D EM field solver [7,8].
of the overall
This work is supported under the MOCHA grant #
International Electrotechnical Commission (IEC), release
1.0, March 2001.
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2006, on web at http://www.eigroup.org/ibis/specs.htm.
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microwave and wireless power amplifier behavioral
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Macromodeling via Parametric Identification of Logic
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27, No. 1, pp. 15-23, Feb. 2004.
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Packages, by Bruce C. Kim and Yervant Zorian
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Gasquet, P. Gall-Borrut, and M. Castel, "MMIC's
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A 1-ps resolution on-chip sampling oscilloscope with 64:1
tunable sampling range based on ramp waveform division
scheme", Symposium on VLSI Circuits Digest of
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Circuits Electrical Model (ICEM)”,
Fig. 1. The left panel shows a cellphone with the most relevant blocks as the ICs placed on the board. The right panel shows an
example of the System-in-Package integration that allows the inclusion of four devices within the same package.