Conference Paper

A fully static scheduling approach for fast cycle accurate systemC simulation of MPSoCs

LIP6/UPMC, Univ. Pierre et Marie Curie, Paris
DOI: 10.1109/ICM.2007.4497671 Conference: Microelectronics, 2007. ICM 2007. Internatonal Conference on
Source: IEEE Xplore

ABSTRACT This paper presents principles and tools to facilitate multi-processor system on chips (MPSoCs) design and modeling, and to speed up cycle accurate SystemC simulation. We describe an effective way to build an hardware architecture virtual prototype, using a library of SystemC simulation models based on communicating synchronous finite state machines. This modeling approach supports a fully static scheduling strategy, based on the analysis of the combinational dependency graph. Our static scheduling algorithm has been implemented in the SystemCASS simulator, and provides speed-up of one order of magnitude versus the standard event-driven SystemC simulation engine. The modeling approach proposed in this paper has been adopted by the SoCLIB French National Project, that is an open modeling and simulation platform for multi-processors system on chips.

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