Analog Design Considerations For Independently Driven Double Gate MOSfets And Their Application in a Low-Voltage OTA
ABSTRACT This paper explores new capabilities brought on by Independently Driven Double Gate CMOS transistors (IDGMOS) for analog baseband design. Since the gates are disconnected, the corresponding channels are coupled resulting in a dynamic threshold voltage tuning. This operation mode is exploited to create new analog functions and low-voltage circuits. A current mirror is redesigned using IDGMOS and it is shown that this structure performs an efficient differential function relating to the potentials applied to the back gates. Being adapted to low-voltage operation and self compensated from input common-mode variations, the differential current mirror is employed for the active loading of a low-voltage fully-balanced OTA. It then improves the limited common-mode rejection of the original OTA structure by providing output feed-back and input feed-forward compensation.
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ABSTRACT: Recently, multi-gate MOSFETs such as double-gate MOSFETs have been identified as inevitable inclusion for future nano-scale circuit design. This paper explores the scope of tied-gate (3T), independent gate (4T), symmetric and asymmetric features of double-gate MOSFETs (DGMOSFETs) for ultra-low power and high efficient rectifiers for RFID applications. Various widely used rectifier topologies such as simple conventional rectifier, self-Vth cancellation (SVC) rectifier and differential drive rectifier etc, have been designed to investigate the better candidate for DGMOSFET technology. Analysis reveals that 3T differential drive rectifier topology shows the maximum power conversion efficiency (PCE) and higher DC output voltage level generation. Second part of the work further explores the effects of 3T/4T and symmetric/asymmetric features of DGMOSFETs on the performance of differential drive rectifier. Among the various DGMOSFET configurations for RFID rectifiers, symmetric tied-gate DGMOSFETs have the best power conversion efficiency and the lowest power consumption.
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ABSTRACT: This paper describes an explicit compact model of an independent double gate (IDG) MOSFET with an undoped channel. This model includes short channel effects and also mobility reduction, saturation velocity, series resistance and a charge model. It is applicable for symmetrical, asymmetrical and independent gate devices. The validity of this model is demonstrated by comparisons with ATLAS two-dimensional numerical simulations.Solid-State Electronics 05/2009; 53(5-53):504-513. DOI:10.1016/j.sse.2009.02.005 · 1.51 Impact Factor
Conference Paper: VeSFET as an analog-circuit component[Show abstract] [Hide abstract]
ABSTRACT: The Vertical Slit-based Field-Effect Transistor (VeSFET) is a novel junctionless device with two identical, independently controlled gates. The VeSFET, so far prototyped only as single-device test structures, has been considered in the literature exclusively as a component of digital systems. This paper shows that the device's properties make it attractive also for the analog designer. Some of the VeSFET's analog-design related parameters are compared with those of the MOSFET of the corresponding technology node. Subsequently, a two-stage Miller operational transconductance amplifier (OTA) is proposed that makes use of the VeSFET's two independently-controlled gates to drastically reduce the common-mode gain. An example application of the OTA in a current mirror is also presented.Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2013 IEEE 16th International Symposium on; 01/2013