Conference Proceeding

Millimeter-wave amplifiers in 65-nm CMOS

Helsinki Univ. of Technol., Espoo
10/2007; DOI:10.1109/ESSCIRC.2007.4430298 ISBN: 978-1-4244-1125-2 pp.280 - 283 In proceeding of: Solid State Circuits Conference, 2007. ESSCIRC 2007. 33rd European
Source: IEEE Xplore

ABSTRACT We report 40 GHz and 60 GHz amplifiers in 65-nm CMOS achieving state-of-the-art performance. Simulations are verified with on-wafer measurement results. The 40-GHz amplifier exhibits 14.3 dB of gain at 42 GHz and better than 10 dB between 38 to 54 GHz with a compact chip area of 0.286 mm2. The measured noise figure is 6 dB at 50 GHz. The 1-dB output compression point is at +6-dBm power level using a 1.2 V supply. The 60-GHz amplifier achieves better than 11 dB of small-signal gain from 45 to 65 GHz. The measured noise figure is 5.6 dB at 60 GHz and below 6 dB from 55 to 65 GHz. The AM/AM and AM/PM characteristics of the 60-GHz amplifier chip were extracted from the large-signal S-parameter measurement results. The saturated output power is +7 dBm at 60 GHz using a 1.2 V supply. The size of the 60-GHz amplifier is 0.87 mm times 0.70 mm.

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Keywords

+6-dBm power level
 
1-dB output compression point
 
40-GHz amplifier exhibits 14.3 dB
 
60 GHz amplifiers
 
60-GHz amplifier
 
60-GHz amplifier chip
 
AM/PM characteristics
 
large-signal S-parameter measurement results
 
measured noise figure
 
on-wafer measurement results
 
saturated output power
 
small-signal gain
 
state-of-the-art performance
 

M. Varonen