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Evaluation of Reliability and Data Retention of an Irradiated

Nonvolatile Memory

Phil Layton, Larry Longden and Ed Patnaude

Maxwell Technologies Inc, 9244 Balboa Ave, San Diego, CA 92123, USA

Abstract-Space systems require high reliability nonvolatile

memory. This paper analyzes the reliability of an EEPROM for

data retention, endurance and radiation performance across

multiple die lots.

I.

INTRODUCTION

Long term nonvolatile memory reliability is a potential

concern in space environments. Typical part analysis

includes individual lot TID testing and a separate reliability

analysis. For devices such as nonvolatile memory, which is

frequently used to store critical data such as boot code, the

understanding of the reliability of the device while under

irradiation is important to understand. Data retention is not

typically tested in TID tests. The overall reliability of the

part requires understanding the parametric performance,

functionality and data retention. The authors have unique

access to Maxwell EEPROM manufacturing data, which

includes large numbers of die lot specific TID and reliability

data. This paper will look at the reliability of EEPROMs

using large sampling of TID, data retention and life test

data.

The Hitachi HN58C1001 EEPROM utilizes a Floating

Gate Technology as shown in Figure 1. Each memory cell

location in the array is constructed of a single MOS

transistor with a floating gate. The polysilican gate is

encapsulated in silicon dioxide, which insulates it from the

transistor channel. By charging and discharging the

floating gate, the output of the memory can be maintained

as a logic 0 or logic 1.

With the floating gate charged, the output of the memory

cell will be logic 0. To program the cell to logic 0 the

control gate of the cell is turned on causing current to flow

through the transistor creating enough energy to allow free

electrons to tunnel through the insulator thus charging the

floating gate. Once the gate has been charged it will hold

that charge for longer than ten years with the device in a

powered or unpowered state. This is referred to as “the

data retention time”.

The silicon dioxide material used to insulate the floating

gate is not a perfect insulator. Over time the charge on the

gate will leak off through conductive paths made up of

impurities in the material. In a small percentage of

EEPROM devices there are sufficient impurities in the

insulating material to cause cells to leak off in days or

weeks rather than years. Standard testing and screening

methods will not always find these infant mortalities.

Therefore a more extensive screening methodology is

required to detect these defects for long term data retention

reliability. Maxwell’s data retention screen is intended to

detect these defective parts and remove them from the final

production devices. We are able to use that data to

generate long term data retention and reliability calculations

of this part. With ionizing radiation (TID), electron hole

pairs generated in the oxide layer may also create paths for

leakage. Therefore TID may also affect data retention.

We present data and analysis below to evaluate the Hitachi

HN58C1001 128k x 8 EEPROM for data retention both

before irradiation and after irradiation up to 40 krad(Si).

Endurance evaluation involves testing for failures from

multiple erase and write cycles. The EEPROM is specified

for 10,000 erase and write cycles. We tested devices both at

specification and at 2 times specification after irradiation to

40 krad(Si) to evaluate whether TID induced leakage

degrades endurance.

With large nonvolatile memory requirements, many

applications require an analysis of performance variations

over large sample lots.

To address these concerns, we present three sets of data: 1)

die lot TID test data from 20 different die lots, 2) data

retention tests from production screening and devices that

have undergone irradiation to 40 krad(Si) and data retention

testing, and 3) endurance test on parts that have both

undergone irradiation and data retention tests. These test

show that this device is robust and will meet specifications

in space radiation environments.

Figure 1. Floating Gate Cell

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II.

TID TESTING

A. Die lot TID test data

The authors have collected a significant amount of die lot

specific TID data on the EEPROM. Twenty different die

lots were analyzed for variations in performance with TID.

Each die lot was typically tested at 5 volts both in the write

read mode and in the read only mode. We analyzed the 5-

volt write read parametric data only as this put the most

stress on the parts by adding an extra write cycle at each test

level. Since the data comes from 20 separate die lot test

over several years, the total dose test levels for each die lot

varied. Overall over 160 parts were irradiated. For each

total dose level, we used a mean point with a standard

deviation from that mean to analyze the data. Table 1

shows the averaged TID test points, the standard deviation

of the test levels from the mean and the number of die lots

with test data at each level (each die lot had approximately 8

irradiated parts). The number of die lots tested at each level

varies due to some tests skipping some of the levels, with

some tests going to higher levels. The higher level tests

were not included in this analysis for consistency. Not all

die lots were tested at each level as shown in Table 1 only

18 lots were tested at each level.

Table 1. EEPROM TID Levels and Standard Deviation

TID

krad(Si)

Standard

Deviation

krad(Si)

Number

of Die

lots

0 0 18

29 3.3 18

43 2.4 18

Looking at the usage of a large number of devices, a one

sided statistical analysis [1] would enable the prediction of

failure or parametric degradation outside of specification

based on the mean and standard deviation. This analysis

calculates the probability a parameter on one device in a

large statistical sample will drift out of specification, based

on a set test sample size. Equation 1 gives a maximum

limiting quantity for a set number of parts tested and

planned to be used based on an average standard deviation

and a set confidence level.

Lmax = m + KTL(n,C,P)S

Where:

Lmax is the maximum limiting quantity

m is the mean

KTL is the tolerance limit and is a function of the sample

size n, desired confidence, C and lot quality (survival

probability) P

S is the standard deviation

(1)

Standby current with CE = VCC showed the greatest

movement of all the parameters measured. Figure 2 shows

the Standby current with CE=VCC with the error bars on

the average line ("avrg") showing the standard deviation for

both the TID levels (x error bars) and the standard

deviation (y error bars) of the measured current. As can be

seen, the average and the Lmax values are well within

operating specification at 43 krad(Si). Figure 3 shows the

leakage current, both the average over the lots and Lmax.

Although there is some increase in leakage current with

TID, the levels are well under the 2 µA limit.

Looking at the 43 krad(Si) there were 144 devices tested.

We analyzed half of those device for parametric drift. For

ICC1 the mean ICC1 was 8.0 µA with a standard deviation

of 4.1 krad(Si). The KTL factor for a probability of 0.99 (lot

quality) and a confidence factor of 90%, is 2 [2]. Lmax is

then 16.1 µA. Therefore one would expect even with a

large 100-piece sample size that all devices would be well

within the 20 µA requirement based on a grouping of all the

die lots. Lmax was evaluated for the other tested

parameters and all were within specification after irradiation

to 43 krad(Si).

B. Die Lot Variation

The individual die lots where then analyzed for lot to lot

variation. We looked at each die lot at three different TID

0

100

200

300

400

500

05 1015 20 2530354045

TID krad(Si)

Leakage current (nA)

IIL average

IIL Lmax

ILO 5.5v aver

ILO 5.5V Lmax

Maximum 2µA

Figure 3. Leakage Current as a function of TID and Lmax.

Note the Maximum is 2000nA.

0

5

10

15

20

05 10 152025 3035 4045

TID krad(Si)

uA

avrg

Lmax

Max 20 uA

1 Standard

Deviation

Figure 2. ICC1 Standby Current CE=VCC for EEPROM

die lots. Average and Lmax values are shown.

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levels 0 krad(Si), 29 krad(Si) and 43 krad(Si). Tables 2

through 4 show the mean of several measured parameters

and the number of standard deviations from the

specification. The number of standard deviation from the

average is measured by the absolute value of the difference

between the specification and the mean divided by the

standard deviation. The standard deviation is a function of

the variance of the data and therefore reflects how tight the

data points are to each other. Therefore although the

averages may be close if there is a large data spread this will

be reflected in the "spec-mean/σ" columns with a smaller

value then a tightly grouped set of data. High numbers in

the "spec-mean/σ" columns show very tightly grouped

numbers. For some of the prerad data some values where all

the same and the authors had to add a small deviation to

prevent dividing by zero, any number over a thousand

shows data where all data points were at the mean. This

number also reflects the inherent limitation of the testers,

since some values are binned based on tester sensitivity a

slight change in value may push the "measured" value into

the next measurement bin or tester resolution. If the bins

are large relative to the specification these can result in a

large movement in the "spec-mean/σ" number that only

reflects the lack of tester resolution.

As the TID increases the lowering "spec-mean/σ" numbers

shows both the increase in the mean and the increasing

spread of the data. The "spec-mean/σ" number for ICC

operating and VOL stay consistently high across the three

radiation levels with the lowest value for VOL of 24

actually occurring in the pre-irradiation test for die lot

G20002. This is a function of testers voltage measurement

resolution as discussed above. Access time doesn't move

much with the lowest distance to the specification being 5

standard deviations for a few die lots at 43 krad(Si).

Standby Current is the closest to specification with one die

lot (G20002 mentioned above) at 29 krad(Si) measuring 1

standard deviation from the specification and two different

die lots measuring 1 deviation from specification at 43

krad(Si). Interestingly Standby Current forG20002 actually

improves at 43 krad(Si), which shows how sensitive this

leakage current measurement is with a specification of only

20 µA. With data and access to large numbers of die lots,

high TID and high margin mission requirements can choose

the appropriate die lot based on data .

III. DATA RETENTION TESTING

Production testing includes a data retention screening. We

used this data in addition to radiation data to evaluate the

EEPROM for data retention performance. All flight lots

are normally put through a burn in to screen out infant

mortality. These parts are then electrically tested again at

room temperature, programmed with a checkerboard

pattern of 55AA and then software protection is enabled.

The parts are then placed in a 150°C oven, un-biased, for

72 hours. The parts are unbiased during this test (worst-

case condition) to demonstrate their ability to retain charge

across the floating gate without bias. Upon completion of

the un-biased bake, the patterns are verified on an ATE

tester. Any devices that fail pattern verification can then

Table 2 Prerad die lot measured parameter variation from

specification

Parameter

Limit

Diel Lot

B20079

B20080

B20462

C20384

E20007

E20008

E20055

E20312

E20313

E20315

E20316

F20019

F20020

F20023

F20036

F20049

F20051

G20002

Mean

13.5

13.6

13.9

13.4

12.7

13.2

13.4

13.3

13.2

13.1

13.6

12.7

13.2

13.8

12.9

12.5

12.9

12.6

Mean

3.6

3.7

3.4

3.5

3.6

3.3

3.3

3.9

3.4

3.8

3.6

3.3

3.6

3.3

3.6

3.4

3.8

3.8

Std Dev from

Spec

143

3644

93

3689

300

187

186

293

49

91

144

68

55

110

300

112

295

182

Mean

102

100

96

96

100

100

100

100

97

94

98

95

93

90

100

102

102

99

Std Dev

from Spec

83

75

6797

339

73

66

58

75

277

117

123

37

41

43

6708

114

27

24

Mean

89.2E-9

85.1E-9

85.1E-9

89.5E-9

86.9E-9

85.1E-9

87.2E-9

86.2E-9

84.9E-9

83.7E-9

86.7E-9

84.4E-9

84.8E-9

80.5E-9

82.5E-9

86.5E-9

86.7E-9

87.0E-9

106

176

67

105

680

206

121

150

206

249

158

72

99

152

117

96

235

192

41

115

41

7

239

54

60

112

36

39

15

12

35

74

27

39

9

8

50 mA 20 uA

Spec−

400 mV 120 ns

Spec −

VOL, Access Time Standby CurrentICC operating

σ

MeanSpec−

σ

Mean

σ

Mean

Table 3. 29krad(Si) die lot measured parameter variation

from specification

Parameter

Limit

Diel Lot

B20079

B20080

B20462

C20384

E20007

E20008

E20055

E20312

E20313

E20315

E20316

F20019

F20020

F20023

F20036

F20049

F20051

G20002

Mean

13.4

13.4

13.8

13.4

12.5

13.2

13.4

13.3

13.0

12.9

13.4

12.4

12.9

13.5

12.7

12.2

12.6

12.3

Mean

4.1

4.5

3.7

5.4

6.3

4.6

4.5

5.0

6.4

4.7

8.6

5.7

5.9

4.6

4.4

5.0

6.7

12.7

Mean

98

97

101

101

105

95

97

96

93

94

108

100

98

97

97

96

102

101

Mean

92.4E-9

88.7E-9

87.7E-9

93.5E-9

89.2E-9

86.2E-9

88.6E-9

87.3E-9

88.8E-9

88.5E-9

89.6E-9

87.2E-9

87.7E-9

84.9E-9

87.3E-9

91.0E-9

95.0E-9

96.0E-9

100

196

53

167

193

212

99

223

244

166

196

70

97

272

116

98

305

196

59

34

39

10

9

20

17

23

7

30

3

4

9

17

15

13

6

1

214

169

53

111

67

171

277

339

34

35

29

50

87

78

69

25

136

99

19

23

23

4

25

28

27

38

18

20

14

7

19

20

22

21

6

9

50 mA

Spec−

20 uA

Spec−

400 mV 120 ns

Spec−

ICC operating Standby CurrentVOL, Access Time

σ

Mean

σ

Mean

σ

MeanSpec −

σ

Mean

Table 4. 43 krad(Si) die lot measured parameter variation

from specification.

Parameter

Limit

Diel Lot

B20079

B20080

C20037

D20128

E20007

E20008

E20055

E20312

E20313

E20315

E20316

F20019

F20020

F20023

F20036

F20049

F20051

G20002

Mean

13.4

13.5

12.8

12.3

12.4

12.9

13.3

13.0

12.9

12.9

13.3

12.2

12.9

13.5

12.6

12.1

12.5

12.2

Mean

4.9

4.7

6.3

5.5

4.2

4.4

4.2

4.8

13.7

7.5

12.9

10.0

9.5

6.0

5.9

7.5

5.7

8.0

Mean

99

94

102

107

105

100

108

98

104

98

107

100

101

98

107

94

100

99

Mean

94.0E-9

88.2E-9

93.8E-9

98.8E-9

89.7E-9

89.1E-9

91.0E-9

89.9E-9

89.2E-9

88.8E-9

91.8E-9

90.2E-9

88.0E-9

85.3E-9

87.5E-9

91.7E-9

90.8E-9

92.2E-9

55

140

72

145

193

167

91

284

166

193

202

66

93

333

107

110

288

182

23

26

23

24

47

23

28

26

1

6

1

3

2

4

7

4

9

3

275

139

98

134

57

43

59

87

55

138

97

47

47

87

81

34

212

168

12

14

5

9

22

22

19

27

17

15

11

9

18

21

21

18

5

11

50 mA

Spec−

20 uA

Spec−

400 mV

Spec−

120 ns

Spec−

ICC operatingStandby CurrentVOL,Access Time

σ

Mean

σ

Mean

σ

Mean

σ

Mean

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be counted (and removed from production lots). The parts

are then programmed with all 00’s and software protection

is disabled and the parts are tested again. This data was

then used as part of our analysis.

The 55AA checkerboard pattern of alternating 1’s and 0’ is

widely used in memory testing. This pattern tests for

leakage to the voltage supplies and leakage between

adjacent cells. The maximum rated storage temperature of

the device is 150°C. Since high temperature accelerates

the leakage characteristics of the memory cell, using the

highest allowable temperature

acceleration. The principle of temperature acceleration is

used when determining component reliability. The

Arrhenius model (equation 2) predicts failure based on

time acceleration due to temperature. It is widely used in

the semiconductor industry to establish FIT rates.

The equation takes the form of:

AF = exp {(AE / k)[1/T1-1/T2]} (2)

WhereAF = Acceleration Factor

AE = Activation Energy

k = Boltzmann's Constant (8.6E-5 eV/K)

T1 = Lower Temperature

T2 = higher Temperature

We used the activation energy of 1.1 eV supplied by

Hitachi. A data retention period of ten years is specified

by Hitachi at 55°C and below. Therefore T1 is 328 °K

(55°C ) and T2 is 423 °K (150 °C) . Using these number

and plugging them into equation 2, the data retention test

simulates a 50 year period.

A. Data

Table 5 summarizes the results of the data retention tests

performed on the EEPROM. The first row shows the

results of the production screening test where the parts

were not irradiated. Any parts that fail are then removed

from the production lot and the 100% screened parts are

then used for flight parts (second row). There are a large

number of die lots and parts in this set of data, which can be

used as a benchmark to compare to the irradiated part data.

The last row shows the result of life tests performed on

irradiated parts. The Fit rate [3] and Mean time between

failures (MTBF) for the last three rows show only the upper

bound for FIT rate and lower bound for MTBF, since there

were no failures during the tests. This means the fit rate is

arrived at assuming that if one more part is used there will

be a failure.

gives the highest

Table 5. Data Retention Versus TID

Data

Description

# of

Parts

# of

Failures

Radiation

Level

(krad(Si))

Fit

Rate

Mean Time

between

Failures

(years)

111,450 Screening

Data

8741 4 0 1.024

Production

Lot

8737 0 0 <0.26 >445,600

Radiation

Test

35 0 40 <62 >1,836

B Analysis

1) Non-irradiated Data Retention FIT rate.

The number of failures seen in the non-irradiated parts

was very small (four out of 8741 devices). The calculated

data retention FIT rate for the screening test on non-

irradiated parts is 1.02, which is quite small indicating a

mean time between failures of 111,450 years per device.

As an example, if one where to use 100 devices for 10

years, the probability of a data retention failure would be

0.9% or a 99.1% chance of no data retention failure for

these prescreened parts. Since Maxwell screens out those

failures with a 50 year data retention test, actual flight lots

would expect no data retention failures.

2) Data Retention with Radiation

Since there were no data retention failures in the

irradiated parts the data shows that leakage currents

generated by total ionizing dose at 40 krad(Si) are not

sufficient enough to cause a data retention failure.

Therefore data retention is not degraded by TID at 40

krad(Si) .

IV. ENDURANCE TEST

Endurance testing evaluates the ability of the devices to

undergo repeated erase and write cycles. The device is

specified for 10,000 erase/write cycles. We performed a

series of tests summarized in Table 6. The last row test

included three separate stress variables including a 2x

specification endurance test, data retention and irradiation to

40 krad(Si) . In this test the 10 devices went through the

following test sequence:

1) 5000 write cycles with alternating 55AA and AA55

patterns

2) 72 hour 150 °C data retention test with 55AA pattern

3) 72 hour 150 °C data retention test with AA55 pattern

4) 10 krad(Si) irradiation

Steps 1 through 4 where then repeated three more times

to a total of 20,000 write cycles, 8 data retention tests and

40 krad(Si) and finally a full electrical test was performed

on the devices (all passed the electrical tests).

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Table 6 Endurance Test Summary

# of

Parts

Write

Cycles

Test

Description

Erase/

# of

Failures

Radiation

Level

(krad(Si))

Post

production

8737 25 0 0

Endurance 10 10,000 0 0

Endurance +

radiation

10 10,000 0 40

2x

Endurance

+Data

retention +

radiation

10 20,000 0 40

The data shows several results: 1) the write cycles do not

contribute to data retention failures. The 4 devices that

failed data retention during prescreening in table 4 went

through a total of 218525 total write cycles spread out over

8741 parts. In table 6 30 parts were subject to a total of

400,000 write cycles without failure. Therefore the erase

write sequence does not induce any damage to the floating

gate cell. 2) endurance is not effected by TID. The last two

rows shows that at 40 krad(Si) irradiation levels the leakage

currents are not significant enough to induce any endurance

or data retention failure.

V. CONCLUSION

A unique set of data is available on a nonvolitile memory

that allows the statistical analysis of this device for TID

across multiple die lots, the effect of TID on data retention

and endurance. Several conclusions can be drawn from the

data.

Die lot electrical performance variation exists as can be seen

from table 1. These variations are small compared to the

parts electrical specifications and are partly a function of the

resolution of test equipment. TID increases the die lot

electrical performance variation. Despite the increase in

data spread with TID, all but one parameter were

significantly below the

specifications to be considered insignificant with regards to

large sample lots and typical mission margin requirements.

Standby current is the only parameter to show any

significant movement relative to the specifications after

irradiation to 43 krad(Si). This parameter stayed within

specification for all 80 tested devices at 43 krad(Si). When

clumping all die as one lot, the large number of tested

devices shows all parameters stayed within specification

after 43 krad(Si) when using a one sided confidence test.

Only when looking at each die lot separately and using the

same one sided confidence test does certain die lots show a

risk of exceeding standby current for large mission lots.

Because of this, Maxwell assigns die lots based on package

level shielding and mission requirements which are a

function of TID and required margins to insure that all

assigned parts meet mission requirements.

maximum performance

The unscreened EEPROM data retention FIT rate is

approximately 1 with a MTBF of 11,450 years. Actual

flight lots are 100% screened to 50 years of data retention so

no parts are expected to fail. Additionally, tests show that

data retention is not effected after irradiation to 40 krad(Si),

which is the uppermost die level requirement for most

environments used in conjunction with Maxwell's shielded

packages.

Endurance tests show that the devices more then meet the

specification requirement

Endurance, data retention in conjunction with TID at 40

krad(Si) test show that endurance and data retention are not

effected by TID at 40 krad(Si).

In summary, an extensive series of tests show that this

device is robust, meeting high reliability requirements in a

space environment with margin.

of 10,000 write cycles.

ACKNOWLEDGMENT

The authors wish to thank Carol Jackson for her help with

some of the statistical analysis.

REFERENCES

[1] Mil Handbook -814 p 90 -103

[2] A detailed discussion of calculating one-sided KTL

values is provided on

http://www.itl.nist.gov/div898/handbook/prc/section2/prc26

3.htm.

[3] The FIT rate is defined as the expected number of

component failures per 109 (ten to the ninth power, or

1,000,000,000) hours. The FIT rate can be converted to the

MTBF (Mean Time Between Failures) in hours as MTBF =

109/FIT.

NIST's web site at