Theoretical Analysis and Implementation of a Variable Gain Even Harmonic Mixer
Nat. Chung-Cheng Univ., Ming-HsiungDOI: 10.1109/VDAT.2007.372760 Conference: VLSI Design, Automation and Test, 2007. VLSI-DAT 2007. International Symposium on
Source: IEEE Xplore
This paper presents a new topology of variable gain even harmonic mixer (VGEHM) for IEEE 802.11 a, which includes a proposed NMOS double frequency circuit (DFC) and a PMOS active load (AL) topology. The proposed NMOS DFC can immunize the DC offset and increase isolation. The AL is used to increase gain and achieve wide-gain variation. In this paper, theoretical analyses of conversion gain and linearity have been described in detail. The proposed mixer is implemented in TSMC CMOS 0.18 mum process to evaluate its performance. The measured results, according to RF of 5.25 GHz and IF of 800 KHz, show the isolation of 57.35 dB between RF and LO, and the variable conversion gain between -28.02 dB and 6.21 dB. Meanwhile, the high linearity is also achieved by referring to input compression point (IIPIdB) of -16 dBm, input second order intercept point (IIP2) of 17.66 dBm, input third order intercept point (IIP3) of -3.945 dBm. Besides, low power dissipation of 7.2 mW without buffer for 1.8 V supply voltage is also achieved.
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ABSTRACT: A 2−10 GHz Gilbert-type mixer is reported in which the gate widths of the transistors in the RF stage are reconfigurable. The change in the total gate-width of the RF devices ultimately results in a variable conversion gain for the mixer. Measurements show that the conversion gain can vary from a maximum of 24 dB to a minimum of 9 dB. The IP1dB is −19 dBm at the highest conversion gain setting and −4 dBm at the lowest setting, while the OP1dB remained fairly constant at +3 dBm for all conversion gain levels, as expected. The IIP3 was −12 dBm and +3.5 dBm at the high and low conversion gain settings, respectively. The OPI3 of the mixer remained constant at around +11 dBm. The mixer's dc power consumption was dependent on the conversion gain and it ranged from 2.4 mW up to 18 mW drawn from a single 1.2 V supply. The chip core measures 0.19 mm 2 .
Conference Paper: Reconfigurable broadband mixer with variable conversion gain[Show abstract] [Hide abstract]
ABSTRACT: form only given, as follows. A 2 to 10 GHz Gilbert-type mixer is reported in which the gate widths of the transistors in the RF stage are reconfigurable. The change in the total gate-width of the RF devices results in a variable conversion gain for the mixer. Measurements show the mixer can yield maximum conversion gain of 24 dB and a minimum of 9 dB. The measured IP1dB ranged from −19 dBm to −4 dBm and the IIP3 ranged from −12 dBm to +3.5 dBm. The chip was fabricated in 130 nm CMOS and the circuit core measures 0.19 mm2.Microwave Symposium Digest (MTT), 2011 IEEE MTT-S International; 06/2011
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ABSTRACT: A broadband downconverter mixer using an opera- tional transconductanceamplifier (OTA)in the RF transconductor stage is presented in this paper. By changing the OTA's transcon- ductance through a dc control voltage, the mixer's conversion gain is varied. Experimental results show that the mixer's conversion gain can vary from 17 dB down to 1.2 dB over a 12 GHz band- width. The maximum of the mixer is 3.7 dBm and its maximum IIP3 is 8.6 dBm. Meanwhile, the maximum is 7 dBm and the maximum OIP3 is 21 dBm. The circuit con- sumes a maximum of 5.9 mW of power from a 1.2 V supply. The chip occupies an area of 0.105 excluding bonding pads. Index Terms—Broadband, CMOS, high-linearity, mixer, opera- tional transconductance amplifier (OTA), RFIC, variable conver- sion gain.IEEE Microwave and Wireless Components Letters 10/2011; 21(10):565-567. DOI:10.1109/LMWC.2011.2163387 · 1.70 Impact Factor
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