Conference Paper

ESD-induced internal core device failure: new failure modes in system-on-chip (SOC) designs

Global Technol. Leader, Santa Clara, CA, USA
DOI: 10.1109/IWSOC.2005.58 In proceeding of: System-on-Chip for Real-Time Applications, 2005. Proceedings. Fifth International Workshop on
Source: IEEE Xplore

ABSTRACT With MOSFET scaling, increased design complexity, and multiple system power domains, ESD failures occur in internal core areas which are not connected to external package pins. A review of the various internal core device failure mechanisms and design recommendations are presented.

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