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Review: Semiconductor Piezoresistance for Microsystems

A. Alvin Barlian, Woo-Tae Park, Joseph R. Mallon Jr, Ali J. Rastegar, and Beth L. Pruitt

Stanford University, Mechanical Engineering, Stanford, CA 94305 USA

A. Alvin Barlian: barlian@stanfordalumni.org; Woo-Tae Park: wtpark@mems.stanford.edu; Joseph R. Mallon:

mallon@stanford.edu; Ali J. Rastegar: alir1@stanford.edu; Beth L. Pruitt: pruitt@stanford.edu

Abstract

Piezoresistive sensors are among the earliest micromachined silicon devices. The need for smaller,

less expensive, higher performance sensors helped drive early micromachining technology, a

precursor to microsystems or microelectromechanical systems (MEMS). The effect of stress on

doped silicon and germanium has been known since the work of Smith at Bell Laboratories in 1954.

Since then, researchers have extensively reported on microscale, piezoresistive strain gauges,

pressure sensors, accelerometers, and cantilever force/displacement sensors, including many

commercially successful devices. In this paper, we review the history of piezoresistance, its physics

and related fabrication techniques. We also discuss electrical noise in piezoresistors, device examples

and design considerations, and alternative materials. This paper provides a comprehensive overview

of integrated piezoresistor technology with an introduction to the physics of piezoresistivity, process

and material selection and design guidance useful to researchers and device engineers.

Keywords

MEMS; microfabrication; micromachining; micro-sensors; piezoresistance; piezoresistor; sensors

I. INTRODUCTION

Piezoresistive sensors are among the first Micro-Electro-Mechanical-Systems (MEMS)

devices and comprise a substantial market share of MEMS sensors in the market today [1],

[2]. Silicon piezoresistance has been widely used for various sensors including pressure

sensors, accelerometers, cantilever force sensors, inertial sensors, and strain gauges. This paper

reviews the background of semiconductor piezoresistor research (Section I), physics and

limitations (Section II), applications and devices (Section III), and newer promising

piezoresistive materials (Section IV).

A. History

William Thomson (Lord Kelvin) first reported on the change in resistance with elongation in

iron and copper in 1856 [3]. Telegraph wire signal propagation changes and time-related

conductivity changes, nuisances to telegraph companies, motivated further observations of

conductivity under strain. In his classic Bakerian lecture to the Royal Society of London, Kelvin

reported an elegant experiment where joined, parallel lengths of copper and iron wires were

stretched with a weight and the difference in their resistance change was measured with a

modified Wheatstone bridge. Kelvin determined that, since the elongation was the same for

both wires, “the effect observed depends truly on variations in their conductivities.”

This paper provides a comprehensive overview of integrated piezoresistor technology with an introduction to the physics of

piezoresistivity, process and material selection and design guidance useful to researchers and device engineers.

NIH Public Access

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Published in final edited form as:

Proc IEEE Inst Electr Electron Eng. 2009 ; 97(3): 513–552. doi:10.1109/JPROC.2009.2013612.

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Observation of these differences was remarkable, given the precision of available

instrumentation.

Motivated by Lord Kelvin’s work, Tomlinson confirmed this strain-induced change in

conductivity and made measurements of temperature and direction dependent elasticity and

conductivity of metals under varied orientations of mechanical loads and electrical currents

(Fig. 1) [4], [5].

The steady state displacement measurement techniques of Thomson and Tomlinson were

replicated, refined, and applied to other polycrystalline and amorphous conductors by several

researchers [6]–[9]. In 1930, Rolnick presented a dynamic technique to quantify the resistance

change in vibrating wires of 15 different metals [10]. In 1932, Allen presented the first

measurements of direction-dependent conductivity with strain in single crystals of bismuth,

antimony, cadmium, zinc and tin [11]–[14]. Based on her work, Bridgman developed a tensor

formulation for the general case of homogeneous mechanical stress on the electrical resistance

of single crystals [6], [7].

In 1935, Cookson first applied the term piezoresistance to the change in conductivity with

stress, as distinct from the total fractional change of resistance [15]. The term was most likely

coined after piezoelectricity, the generation of charge with applied stress, a ferroelectric-

mediated effect quite different from piezoresistivity. Hanke coined the term piezoelectricity in

1881 after ‘piezen’ from the Greek to press [16], [17]. The now standard notation for

piezoresistivity was adapted from analogous work on piezoelectricity [18]. Voigt formalized

tensor notation for stress and strain in crystals and formulated tensor expressions for

generalized Hooke’s Law and piezoelectricity [19]. He adapted this notation from the works

of Curie and Kelvin [18], [20]–[23].

In 1938, more than 80 years after the discovery of piezoresistance, Clark and Datwyler used a

bonded wire to monitor strain in a stressed member [24]. In the same year, Arthur Ruge

independently reinvented the bonded metallic strain gauge which had been first suggested by

Edward Simmons, Jr. in 1936 [25]–[28].

In 1950, Bardeen and Shockley predicted relatively large conductivity changes with

deformation in single crystal semiconductors [29]. In his seminal paper on semiconductor

piezoresistance, C. S. Smith (a researcher who was visiting Bell Laboratories from Case

Western Reserve University and who was interested in anisotropic electrical properties of

materials), reported the first measurements of the ‘exceptionally large’ piezoresistive shear

coefficient in silicon and germanium [30].

In 1957, Mason and Thurston first reported silicon strain gauges for measuring displacement,

force, and torque [31]. Semiconductor strain gauges, with sensitivity more than fifty times

higher than conventional metal strain gauges, were considered a leap forward in sensing

technology. Early silicon strain gauges were fabricated by sawing and chemical etching to form

a ‘bar’ shaped strain gauge [32]. The gage was then attached to a material surface with cement.

This method allowed the development of the first bonded semiconductor pressure sensors. The

first commercial piezoresistive silicon strain gauges and pressure sensors started to appear in

the late 1950’s. Kulite Semiconductor, founded in 1958 to exploit piezoresistive technology,

became the first licensee under the Bell piezoresistive patents [33]. By 1960 there were at least

two commercial suppliers of bulk silicon strain gauges: Kulite-Bytrex and Microsystems

[33]. Fig. 2 shows modern bar and U-shaped silicon strain gauges.

Developments in the manufacture of semiconductors, especially Hoerni’s invention of the

‘planar’ transistor in 1959, resulted in improved methods of manufacturing piezoresistive

sensors [34]. Silicon piezoresistive devices evolved from bonded single strain gauges to

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sensing devices with “integrated” (in the sense that the piezoresistive region was co-fabricated

with the force collector) piezoresistive regions. In their classic 1961 paper, Pfann and Thurston

proposed the integration of diffused piezoresistive elements with a silicon force collecting

element [35]. The first such ‘integrated’ device, a diffused piezoresistive pressure sensing

diaphragm was realized by Tufte et al. at Honeywell Research in 1962 [36].

Piezoresistive sensors were the first commercial devices requiring three-dimensional

micromachining of silicon. Consequently, this technology was a singularly important precursor

to the MEMS technology that emerged in the 1980’s. In 1982, Petersen’s seminal paper

“Silicon as a Mechanical Material” reviewed several micromachined silicon transducers,

including piezoresistive devices, and the fabrication processes and techniques used to create

them [37]. Petersen’s paper helped drive the growth in innovation and design of micromachined

silicon devices over the subsequent years.

The field benefited, to a degree that no other sensor technology has, from developments in

silicon processing and modeling for the integrated circuits (IC) industry. Technological

advances in the fabrication of ICs including doping, etching, and thin film deposition methods,

have allowed significant improvements in piezoresistive device sensitivity, resolution,

bandwidth, and miniaturization (Fig. 3). Reviews of advances in MEMS, microstructures, and

microsystems are available elsewhere [38], [39].

II. PIEZORESISTANCE FUNDAMENTALS

The electrical resistance (R) of a homogeneous structure is a function of its dimensions and

resistivity (ρ),

(1)

where l is length, and a is average cross-sectional area. The change in resistance due to applied

stress is a function of geometry and resistivity changes. The cross-sectional area of a bulk

material reduces in proportion to the longitudinal strain by its Poisson’s ratio, ν, which for most

metals ranges from 0.20 to 0.35. For anisotropic silicon, the effective directional Poisson’s

ratio ranges from 0.06 to 0.36 [40], [41]. The isotropic lower and upper limit for ν are −1.0 and

0.5 [42].

The gauge factor (GF) of a strain gauge is defined as

(2)

where ε is strain and ΔR/R is fractional resistance change with strain. The change in resistance

is due to both the geometric effects (1 + 2ν) and the fractional change in resistivity (Δρ/ρ) of

the material with strain [10],

(3)

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Geometric effects alone provide a GF of approximately 1.4 to 2.0, and the change in resistivity,

Δρ/ρ, for a metal is small—on the order of 0.3. However, for silicon and germanium in certain

directions, Δρ/ρ is 50–100 times larger than the geometric term. For a semiconductor, elasticity

and piezoresistivity are direction-dependent under specified directions of loads (stress, strain)

and fields (potentials, currents). This section first reviews notation and then discusses

fundamentals of piezoresistivity in semiconductors. We also refer the reader to the

comprehensive background on piezoelectricity in Nathan and Baltes [43].

A. Notation

1) Miller Indices and Crystal Structure—Crystals have periodic arrangements of atoms

arranged in one of 14 lattice types and complete reviews are available elsewhere [44], [45].

The Miller indices specify crystal planes by n-tuples. A direction index [hkl] denotes a vector

normal to a plane described by (hkl), and t represents a family of planes equivalent to (hkl) by

symmetry. Angle-bracketed indices, like 〈hkl〉, represent all directions equivalent to [hkl] by

symmetry. In a hexagonal crystal, as found in most silicon carbide polytypes, the Bravais-

Miller index scheme is commonly adopted where four indices are used to represent the

intercept-reciprocals corresponding to the four principal crystal axes (a1, a2, a3, and c). The

axes a1, a2, and a3 are on the same plane and 120° apart from one another while c is

perpendicular to the a-plane defined by the (a1, a2, a3) triplet.

Crystalline silicon forms a covalently bonded diamond-cubic structure with lattice constant

a = 5.43 Å [Fig. 4(a)]. The diamond-cubic structure is equivalent to two interpenetrating face-

centered-cubic (FCC) lattices with basis atoms offset by 1/4a in the three orthogonal directions

[44]. Silicon’s diamond-cubic lattice is relatively sparse (34% packing density) compared to

a regular face-centered-cubic (FCC) lattice (74% packing density). Commonly used wafer

surface orientations in micromachining include (100), (111), and (110) [Fig. 4(b)].

Photolithography and etch techniques can create devices in various directions to access

desirable material properties. For instance a 〈111〉 oriented piezo-resistor in a (110) plane will

have the highest piezoresistive sensitivity in a pressure sensor [46]. More commonly 〈110〉

aligned piezoresistors on (100) wafers are used because of their high equal and opposite

longitudinal and transverse piezoresistive coefficients. Directionality of silicon piezoresistive

coefficients is discussed in Sections II-A3 and II-D1, and the selection of device orientation

with directional dependence is discussed in more detail elsewhere [31], [35], [47], [48].

2) Stress, Strain, and Tensors—To define the state of stress for a unit element (Fig. 5),

nine components, σij, must be specified, as in:

(4)

The first index i denotes the direction of the applied stress, while j indicates the direction of

the force or stress. If i = j, the stress is normal to the specified surface, while i ≠ j indicates a

shear stress on face i (Fig. 5). From static equilibrium requirements that forces and moments

sum to zero, a stress tensor is always symmetric, that is σij = σji, and thus the stress tensor

contains only six independent components. Strain, εij, is also directional. For an isotropic,

homogeneous material, stress is related to strain by Hooke’s Law, σ = εE [49].

Although “effective” values of Young’s modulus and Poisson’s ratio for a single direction are

often employed for simple loading situations, a tensor is required to fully describe the stiffness

of an anisotropic material such as silicon [37], [50], [51]. The stress and strain are related by

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the elastic stiffness matrix, C, where σij = Cijkl * εkl, or equivalently by the inverse compliance

matrix, S, where εij = Sijkl * σkl:

(5)

(6)

Collapsed notation reduces each pair of subscripts to one number: 11→1, 22→2, 33→3, 23→4,

13→5, 12→6, e.g., σ11 to σ1, ε12 to ε6, c1111 to c11 and s2323 to s44.

3) Piezoresistance—Single crystal germanium and silicon, both of which have a diamond

lattice crystal structure, were the first materials widely used as piezoresistors. Smith reported

the first measurements of large piezoresistive coefficients in these semiconductor crystals in

1954 noting that work by Bardeen and Shockley, and later Herring, could explain the

phenomena [30]. Smith applied Bridgman’s tensor notation [8] in defining the piezoresistive

coefficients and geometry of his test configurations (Fig. 6). The piezoresistive coefficients

(π) require four subscripts because they relate two second-rank tensors of stress and resistivity.

The first subscript refers to the electric field component (measured potential), the second to

the current density (current), and the third and fourth to the stress (stress has two directional

components). For conciseness, the subscripts of each tensor are also collapsed [31], e.g.,

π1111 → π11, π1122 → π12, π2323 → π44. Kanda later generalized these relations for a fixed

voltage and current orientation (ω) as a function of stress (λ) [47]:

(7)

Smith determined these coefficients for relatively lightly doped silicon and germanium samples

with resistivities ranging from 1.5–22.7 Ω-cm, e.g., 7.8 Ω-cm for p-type silicon [30]. Current

commercial and research practice uses doping levels several orders of magnitude higher than

Smith’s. Higher concentrations have somewhat lower piezoresistive coefficients, but much

lower temperature coefficients of resistance and sensitivity. For example, in our laboratory,

we regularly use doping levels that result in resistivities in the range of 0.005–0.2 Ω-cm [52]–

[57]. Smith measured the piezoresistive coefficients for (100) samples along the 〈100〉 and

〈110〉 crystal directions. Longitudinal and transverse coefficients for the fundamental crystal

axes were determined directly. Shear piezoresistive coefficients were inferred. By these

measurements and considering the crystal symmetry, Smith fully characterized the

piezoresistive tensor of 7.8 Ω-cm silicon as

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(8)

In another early paper, Mason and Thurston utilized bonded gauges with the most favorable

longitudinal orientations to measure displacement, force, and torque [31]. They derived

directional coefficients from full formulations relating the electric field, current density, and

stress components. They also presented more general formulations for longitudinal (

transverse (

) piezoresistive coefficients for a gauge in an arbitrary crystal direction,

)and

(9)

and

(10)

where l, m, and n are the direction cosines of the direction associated with

respect to the crystallo-graphic axes.

or , with

Pfann and Thurston [35] recognized the benefits of using transverse and shear piezoresistance

effects in conjunction with longitudinal piezoresistance for devices. Many of their geometries

employed a full Wheatstone bridge with two longitudinal and two transverse piezoresistors to

increase sensitivity and compensate for resistance changes due to temperature (Sections II-D2

and III-E). Notably, they proposed integrating the piezoresistors with the force collecting

structure and discussed the advantages and disadvantages of a number of geometries for various

types of measurements. They anticipated most of the geometries widely employed today.

Stress sensitivity in silicon also can be exploited by the pseudo-Hall effect and the piezojunction

effect. The pseudo-Hall effect is based on the shear piezoresistive effect, whereby the induced

shear stress distorts the potential distribution in a piezoresistive plane. Motorola Semiconductor

(now Freescale Semiconductor) used this configuration in a pressure sensor in the 1970s [58]

and has continued producing this type of pressure sensor. Doelle et al. and Gieschke et al.

reported geometry-based design rules and novel applications for the pseudo-Hall effect

piezoresistive plates [59]–[61]. The piezojunction effect is defined as the change in the

saturation current of a bipolar transistor or a p-n junction due to mechanical stress [62]. Metal-

oxide-semiconductor field effect transistors (MOSFETs) using the piezojunction effect have

been demonstrated for small cantilever strain sensing [63]–[65]. The main advantage over

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conventional piezoresistors lies in reduced power consumption but this trades off with size and

circuit complexity [66]. The piezojunction effect is also important to understanding sources of

unwanted offset in integrated circuits and sensors [67]–[70].

B. Piezoresistive Theory

The discovery of such large piezoresistive effects demanded a theory of the underlying physics.

This section discusses the prevailing theories at the time of Smith’s measurements as well as

more recent advances. The theories of semiconductor piezoresistance are grounded in one-

dimensional descriptions of electron and hole transport in crystalline structures under strain

(potentially extended to three dimensions and to include crystal defects, electric potentials, and

temperature effects). The various models require some framework of bandgap energy models,

wave mechanics, and quantum effects; the interested reader is referred to [44], [71]–[73] and

the references of this section for more information.

At the time of Smith’s piezoresistance measurements, existing theories were based on shifts

in bandgap energies. The band structure of diamond (Fig. 7) was first calculated by Kimball

in 1935 [74], and that of silicon by Mullaney in 1944 [75]. In 1950, Bardeen and Shockley

presented a model for mobility changes in semiconductors subjected to deformation potentials

and compared both predicted and measured conductivity changes in the bandgap with dilation

[29]. This work served as the basis for later analyses, such as that of Herring [76], [77] and

Long [78].

The mobilities and effective masses of the carriers are significantly different from one another

and fluctuate under strain. N- and p-type piezoresistors exhibit opposite trends in resistance

change and different direction-dependent magnitudes under stress. The magnitudes and signs

of the piezoresistive coefficients depend on a number of factors including impurity

concentration, temperature, crystallographic direction, as well as the relation of voltage, current

and stress to one another and to the crystallographic axes. The relationship between carrier

characteristics and strain has been investigated both experimentally [30], [31], [79] and

analytically [29], [35], [47], [77], [80], [81]. Focusing on n-type silicon, these early studies

utilized either effective mass or energy band calculations with wave propagation in one

direction at a time. The change in mobility (and thus, conductivity) with lattice strain is

attributed to band warping or bending and the non-uniform density of states.

The implications for the related large mobility and resistance changes were not realized prior

to Smith’s discovery [82], [83]. Following Bardeen and Shockley’s models for mobility

changes with deformation potentials, more refined models of transport and energy band

structure based on new experimental work became available. In 1955, Herring proposed his

Many-Valley model, which adequately explained piezoresistance for n-type silicon and

germanium [29], [35], [77], [80], [81], [84]–[87].

Herring’s Many-Valley model for n-type silicon proposes three symmetrical valleys along the

〈100〉 direction [77]. His model projects the band energy minima in three orthogonal directions

(x, y, z) as locations of constant minimum energy (Fig. 8). The minimum energy of each valley

lies along the centerline of the constant energy ellipsoid of revolution. Electrons have a higher

mobility along the direction perpendicular to the long axis of the ellipsoid. Since electrons

occupy lower energy states first, they are found in these regions bounded by ellipsoids of

constant low-energy. These ellipsoids, bounded by higher-energy regions, are referred to as

valleys. With strain however, the symmetry is broken and the ellipsoids are asymmetrically

dilated or constricted. This results in an anisotropic change in conductivity proportional to

strain.

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Most models represent the direction dependence of bandgap and electron energies by either

directional waves (k has direction and magnitude) or momentum (p) and the effective masses

of the carriers. The energy surfaces for electron mobility are accordingly represented in k-space

or momentum space. The wave propagation is confined to quantum states by the periodicity

of the lattice, and edges in the band diagrams correspond to the edges of the Brillouin zone

(smallest primitive cell, or unit cell, of the reciprocal lattice) oriented in a direction of interest

[44].

In the unstrained silicon crystal, the lowest conduction band energies (valleys) or highest

mobility orientations are aligned with the 〈100〉 directions. The conduction electrons are thus

imagined to be lying in six equal groups or valleys, aligned with three 〈100〉 directions. For

any valley, the mobility is the lowest when parallel to the valley direction, and the highest when

perpendicular to the valley, e.g., an electron in the z valley has higher mobility in the x and y

directions. Net electron conductivity is the sum of the conductivity components along the three

valley orientations and is independent of direction. Net mobility is the average mobility along

the three valleys (two high and one low) [87]. Uniaxial elongation increases the band energy

of the valley parallel to the strain and transfers electrons to perpendicular valleys, which also

have high mobility along the direction of strain. Electrons favor transport in directions of higher

mobility (higher conductivity and lower resistance) in the direction of strain, and tension

removes electrons from the valley in that direction and transfers them to valleys normal to the

tension. In n-type silicon, average mobility is increased in the direction of tension (longitudinal

effect) and lowered transverse to that direction (transverse effect). Compression has the

opposite effect. Lin later provided an explanation of large mobility degradation at higher

transverse electric fields and lower temperatures based on the physics of electron population

and scattering mechanisms of quantized subbands at (100) Si surfaces [88].

The piezoresistance theory for n-type semiconductors continued to be refined from 1954

onward, but until recently “piezoresistive effects in p-type silicon have not been fully clarified

due to the complexity of the valence band structure” [89]. In 1993, Ohmura stated that “the

[piezoresistance] effect for n-type Ge and Si has been successfully accounted for…” while “the

[piezoresistance] effect for p-type Si and Ge has not been fully understood…” [90]. However,

recent computational advances have enabled an improved understanding of p-type

piezoresistance [73], [91]–[93]. This is important because most research and commercial

piezoresistive devices are p-type and models of this successful technology had been largely

based on empirical results. Theoretical studies based on the strain Hamiltonian [94]–[96] and

on deformation potentials in strained silicon as well as cyclotron resonance experimental results

have revealed several factors that affect hole mobilities in semiconductors, e.g., band warping

and splitting, mass change, etc. [97]–[101].

Historically, piezoresistive technology drew from mainstream IC research and continues to do

so. Now, with the strong interest in “strain engineering” to increase transport speed in ICs, the

situation has reversed and mainstream semiconductor technology is drawing on findings of

piezoresistive research. Strain engineered materials (e.g., inclusion of germanium into a silicon

layer) can increase the mobility of a channel in MOS (metal-oxide-semiconductor) devices

[73], [102]–[104]. Suthram et al. [104] applied large uniaxial stress on n-type MOS field-effect

transistors (MOSFETs) and showed that piezoresistive coefficients were constant while the

electron mobility enhancement increased linearly for stresses up to ~1.5 GPa. Fig. 9 shows

plotted hole mobility enhancement factor for several semiconductors as a function of stress.

C. Piezoresistor Fabrication

Several design and process parameters such as energy, dose and doping method as well as

anneal parameters such as temperature, time and environment affect piezoresistor sensitivity

and noise. We review the commonly used fabrication methods for forming piezoresistors on

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semiconductor substrates and discuss their advantages and drawbacks. Diffusion, ion

implantation, and epitaxy are the most common impurity-doping techniques for introducing

dopants into a silicon substrate. These techniques result in different doping profiles (Fig. 10).

A complete review of doping techniques is available elsewhere [105].

1) Diffusion—Diffusion is the migration of dopant atoms from a region of high concentration

to a region of low concentration. The fabrication of piezoresistors using diffusion involves a

pre-deposition and a drive-in step. During the pre-deposition step, wafers may be placed in a

high-temperature furnace (900–1300 °C) with a gas-phase or a solid-phase dopant source

[105], [106]. The gas-phase dopant source, e.g., diborane (B2H6), phosphine (PH3), or arsine

(AsH3), is carried in an inert gas, e.g., N2 or Ar. The solid-phase dopant source (a compound

containing dopant atoms in a form of solid discs) is placed such that the active surface is facing

the surface of the silicon wafer inside the furnace. Both the source and the wafer are heated,

causing transport of dopants from the source to the wafer. Alternately, dopant pre-deposition

may utilize doped spin-on glass layers [107]–[109]. During pre-deposition, the boundary

condition is a constant surface concentration and the doping profile is approximated by a

complementary error function. The source can be removed and dopants “driven-in” deeper

with high temperature annealing (900–1300 °C). Gas-phase dopant sources provide

inconsistent doses for surface concentrations below the solid solubility level.

2) Ion Implantation—Ion implantation was researched extensively in the 1950s and 1960s

as an alternate pre-deposition method to provide better control of the dopant dose [105],

[110]–[121]. Ion implantation gained wide use in the 1980s and remains the preferred method

today. In ion implantation, dopant ions are accelerated at high energy (keV to MeV) into the

substrate. The ions leave a cascade of damage in the crystal structure of the implanted substrate

[118]. Any layer thick or dense enough to block the implanted ions, such as photoresist, silicon

oxide, silicon nitride, or metal, can be used for masking. Typical silicon piezoresistor doses

range from (1 × 1014 to 5 × 1016 cm−2, with energy ranges from 30 to 150 keV [51]. Dopant

distribution is approximated by a symmetric Gaussian distribution (Fig. 10). Most implants

are done with a 7° tilt of (100) silicon wafers to avoid ion channeling, a phenomenon where

ions deeply traverse gaps in the lattice without scattering. Larger implant angles (7°–45°) are

sometimes used to form piezoresistors on etched sidewalls of deep-reactive-ion-etched (DRIE)

trenches as found in flexures or beams in dual-axis cantilevers, in-plane accelerometers, and

shear stress sensors [53], [122]–[125]. One major disadvantage of ion implantation is

significant damage to the crystal. Lattice order is mostly restored by high-temperature dopant

activation and annealing [118]. However, shallow junctions are difficult to obtain with high

crystal quality. Parameters that affect the junction depth include the acceleration energy, the

ion mass, and the stopping power of the material [115].

3) Epitaxy—Epitaxy is the growth of atomic layers on single-crystal materials that conform

to the crystal-structure arrangement on the surface of the crystalline substrate [105]. Chemical

Vapor Deposition (CVD) technique can be used to deposit epitaxial silicon by decomposing

silane (SiH4) or by reacting silicon chloride (SiCl4) with hydrogen. Conventional epitaxial

growth is done at high temperatures (1000–1250 °C) and reduced pressure (30–200 torr). A

clean surface is necessary to obtain a high quality epitaxial layer. Contaminants and native

oxide will prevent single-crystal growth. An in situ HCl clean can remove wafer contaminants

and native oxide. Halide source gases, such as SiCl4, SiHCl3, or SiH2Cl2 (DCS), are used to

grow silicon with the advantage that chlorine is one of the net byproducts. The chlorine removes

metal contaminants from the deposited silicon film, resulting in better quality single-crystal

silicon. Selective deposition of epitaxial silicon, i.e., the silicon deposits only on exposed

regions of silicon, but not on other dielectric films such as SiO2 or Si3N4, can be achieved by

tailoring the deposition conditions [55], [105], [126]–[129]. Epitaxial silicon films may be

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doped during the deposition by introducing appropriate dopant source gases such as AsH3,

PH3, or B2H6 into the chamber along with the silicon source gases.

Epitaxial piezoresistors require no annealing and have a uniform dopant profile (Fig. 10).

Epitaxy has enabled ultra thin piezoresistive layers and increased force sensitivity [130]. Harley

and Kenny [131] and Liang et al. [132] demonstrated the use of epitaxially grown doped silicon

to form piezoresistors in ultra-thin cantilevers (less than 100 nm). This is a practical method

for such thin piezoresistive cantilevers, especially given the difficulties of implanting shallow

junction depths (less than 50 nm), activating dopant atoms, and restoring lattice quality. Joyce

and Baldrey [126] first demonstrated selective deposition of silicon epitaxial layers using

oxide-masking techniques in 1962 and Zhang et al. [133] demonstrated an HCl-free selective

deposition technique. We have also demonstrated epitaxial piezoresistors on the sidewalls of

microstructures for in-plane sensing applications using selective deposition techniques [55].

These epitaxial sidewall piezoresistive sensors showed increased sensitivity over oblique-angle

ion-implanted piezoresistors of the same dose.

4) Doped Polysilicon—Polycrystalline silicon (polysilicon or “poly”) may be doped by

diffusion, ion implantation, or in situ doping. Polysilicon in situ doping introduces gas-phase

dopants with the precursor polysilicon gases during chemical vapor deposition. However,

introduction of dopant gases results in non-uniform polysilicon layer thickness across the

wafer, a lower deposition rate, and dopant nonuniformity [105]. Moreover, adding dopants

during the deposition of the polysilicon layer also affects layer properties and changes grain

size, grain orientation, and intrinsic stress. The deposition temperature, anneal time and anneal

temperature determine the surface roughness, grain size, grain orientation, and intrinsic stress

of the resulting polysilicon layer.

Piezoresistive effects in polysilicon were studied extensively in the 1970s and 1980s [134]–

[146]. French and Evans presented a theoretical model for piezoresistance in polysilicon as a

function of doping, grain size, and orientation and proposed an optimum set of processing

parameters for a given grain size [145].

5) Tradeoffs in Process Selection—Ion implantation is the most common method of

fabricating piezoresistors. Advantages of ion implantation include precise control of dopant

concentration and depth. Disadvantages include lattice damage and annealing requirements for

dopant activation. Diffusion has the advantage of batch processing, but suffers from poor

dopant depth and concentration control. Epitaxy provides excellent depth control without

annealing, which enables shallow junctions with abrupt dopant profiles. However, processing

complexity and equipment costs and availability are drawbacks to epitaxy. Table 1 compares

ion-implantation, diffusion, and epitaxy techniques.

D. Design and Process Effects on Piezoresistor Performance

Design and process parameters affect piezoresistor sensitivity and noise. Sensitivity is a strong

function of dopant concentration and piezoresistor orientation. In choosing the device

geometry, doping, and anneal conditions, the piezoresistive device designer must also consider

the temperature coefficients of sensitivity and resistance, nonlinearity with strain and

temperature, and noise and resolution limits.

1) Device Doping and Orientation—Initial experiments by Smith used bars of silicon cut

from wafers doped while growing the single-crystal ingot [30]. Later, Pfann and Thurston

[35] suggested diffusion techniques to integrate doped piezoresistors on the sensor surface.

The piezoresistive properties of diffused layers were subsequently investigated by Tufte and

Stelzer [79]. They also provided empirical data on piezoresistive coefficients for different

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surface concentrations and resistivities. Kurtz and Gravel replotted their data and noted that

the piezoresistive coefficients decrease approximately with the log of surface concentration

[147].

The early analyses by Smith, and Pfann and Thurston, covered virtually all crystal orientations

and piezoresistor designs for n-type and p-type piezoresistors in use today. Kanda [47] extended

these analyses with graphical representations of the piezoresistive coefficients in arbitrary

directions in the commonly used (100) crystal plane and the less common (110), and (211)

planes. These graphs provide a useful picture of how piezoresistive coefficients vary with

respect to crystal orientations for both longitudinal and transverse geometries (Fig. 11). Kanda

also presented theoretical calculations of piezoresistive change versus dopant concentration.

He suggested a simple power law dependence of the relaxation time with temperature and noted

a discrepancy between his calculations and the experimental data for high doping

concentrations (Fig. 12). In his notation, the piezoresistive coefficient is calculated by

multiplying the piezoresistive factor, P(N, T) (Fig. 13), by the room temperature piezoresistive

coefficient. The calculated values of the P(N, T), agree well with the experimental values

obtained by Mason [148] for doping concentrations less than 1 × 1017 cm−3, over the

temperature range of −50 to 150 °C, but differ by 21% at a concentration of 3 × 1019 cm−3 at

room temperature. The error was attributed to dopant ions scattering for high dopant

concentrations, whereas the calculation only considered lattice scattering. Harley [149] later

evaluated data from several researchers and provided an empirical fit of piezoresistance vs.

concentration that better estimates the sensitivity for higher concentration devices. Our devices

typically fall in a regime described by extension of Harley’s fit [55]–[57], [150].

Four-point bending is used to measure piezoresistive effects in semiconductors [151], [152],

though care must be taken in high-stress test conditions [104]. Richter et al. [48], [153],

[154] demonstrated a novel piezocoefficient-mapping device to measure 3D stresses in device

packaging and also to extract directional piezoresistive coefficients (Fig. 14). Using orthogonal

〈100〉 piezoresistors and 4-point bending strain along the 〈110〉 direction, they measured

piezoresistance coefficients for silicon and strained silicon (Si0.9Ge0.1) molecular beam

epitaxial (MBE) grown layers at boron doping levels of 1 × 1018 and 1 × 1019 cm−3; they

extracted piezoresistive coefficients as a function of doping and direction. Their results are

higher than Smith’s lower dose values and also showed that lattice strain raises the value of

π44.

2) Temperature Coefficients of Sensitivity and Resistance—Piezoresistors are

sensitive to temperature variation, which changes the mobility and number of carriers, resulting

in a change in conductivity (or resistivity) and piezoresistive coefficients (sensitivity) [155].

Consequently, doped silicon can be used for accurate temperature sensing as in resistance

temperature detectors (RTDs). A typical commercial piezoresistive pressure sensor has a

thermal resistance change ten times the full-scale stressed resistance change over a temperature

range of 55 °C. Kurtz [156] presented data and discussed the trend of the piezoresistive

coefficient (π), temperature coefficient of piezoresistive coefficient (TCS), resistivity (ρ),

temperature coefficient of resistivity (TCR) and strain nonlinearity, as a function of dopant

concentration (Fig. 15).

Kurtz was the first to clearly highlight the advantages of using higher doping levels for

piezoresistors. The temperature dependence of sensitivity decreases with increasing surface

concentration. This trend is desirable except that increasing surface concentration also

sacrifices the sensitivity of the piezoresistors. However, the temperature coefficient of

sensitivity drops off faster than sensitivity. Also at higher doping levels, the strain and

temperature nonlinearities in sensitivity, and temperature change of resistance are very much

reduced. Some piezoresistive pressure sensor manufacturers, such as Kulite Semiconductor

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Products, Merit Sensors, and GE NovaSensor manufacture high-dose piezoresistors, taking

advantage of this reduced temperature sensitivity. Ultimately some temperature dependence

in silicon strain sensors is inevitable though this dependence may be compensated by the use

of a half or full-active Wheatstone bridge and conditioning circuitry (Section III-E).

Tufte and Stelzer [79] first presented detailed measurements of these parameters for diffused

layers over a wide range of dopant concentrations (1018 – 1021 atoms cm−3) and temperatures

(−90 °C to 100 °C). They also showed that the piezoresistive coefficient was relatively

insensitive to the diffusion depth for a diffused layer. Kerr and Milnes [157] showed that the

surface dopant concentration could be used as an adequate proxy for the average effective

concentration in modeling the piezoresistivity of diffused layers. More recently, refined

concentration-dependent temperature sensitivity measurements have been reported on

integrated die using 4-point bending and finite element analysis of stress profiles [158].

3) Nonlinearity—The response of piezoresistors to stress is nonlinear at larger strain (>

0.1%). Understanding and compensating for the nonlinearity of piezoresistors is important for

precision piezoresistive devices. Matsuda et al. [159], [160] calculated and measured the

piezoresistive coefficients and third-order effects for both p-type and n-type silicon for the

three major crystallographic orientations with strain up to 0.1%. Higher strain levels were

difficult to measure since surface defects in the silicon lattice cause fracture at low strain levels.

Addressing this problem, Chen and MacDonald [161] co-fabricated a microactuator and a 150-

μm-long, 150-nm-diameter single-crystal silicon fiber from one single-crystal silicon substrate

to reduce the possibility of defects, allowing measurements of strains greater than 1%. With

the increased range of strain, the second and third order fit for piezoresistive coefficients were

quantified more accurately (Fig. 16). Table 2 shows the results obtained by Chen and

MacDonald compared to the data obtained by Tufte and Stelzer [162]. Additional studies of

the effects of strain on semiconductor properties have been undertaken recently as interest in

strained substrates has increased [48], [73], [104], [163].

E. Noise in Piezoresistors

Electrical noise is the random variation in the potential of a conductor. The electrical noise in

a piezoresistor sets the fundamental lower limit of piezoresistive transducer resolution. The

dominant random electrical noise sources in piezoresistors are Johnson (thermal) noise and 1/

f (flicker) noise. Other noise sources, such as inductive or capacitive line pickup also exist

[51]. Also, for many applications the accuracy of piezoresistive transducers is limited by

temperature effects or thermo-mechanical hysteresis, e.g., in commercial piezoresistive

devices such as piezoresistive pressure sensors. Integrated shield layers have been shown to

reduce noise effects, including temperature sensitivity [164].

1) Thermal Noise—Thermal noise, also known as Johnson or Johnson-Nyquist noise, is

universal to resistors. It was first observed in 1928 by Johnson [164] and theoretically explained

by Nyquist [165]. Thermal noise is a function of the absolute temperature T(K) of the resistor,

resistance value R(Ω), and Boltzmann’s constant k (J/K). For a 1 Hz bandwidth the thermal

noise is:

(11)

Thermal noise is fundamental, exists in all resistors, and cannot be eliminated. A discussion

on thermal noise in modern devices can be found elsewhere [166].

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2) 1/f Noise—The power spectral density of 1/f noise, as its name implies, is inversely

proportional to frequency. The origins of 1/f noise are still not fully understood and remain an

active topic of research [167]–[178]. In particular, 1/f noise in piezoresistors is dependent on

fabrication process parameters, such as implant dose and energy, and anneal parameters. A 1/

fn noise exponent of n >1 can be a measure of conductor reliability. Excessive 1/f noise can

indicate poor fabrication process quality [179], [180]. Several researchers have presented

piezoresistive device optimization to include 1/f noise [149], [181]–[183].

Despite many decades of research, the source of 1/f noise is still debated [176]. McWhorter

and Hooge proposed two opposing theories of 1/f noise. These views are currently the leading

explanations for the origin of 1/f noise. The McWhorter model attributes the 1/f noise to surface

factors [184], [185], while the Hooge model implicates bulk defects [167], [177] (Fig. 17).

Experiments show that 1/f noise is due to conductivity fluctuations in the resistor [177],

[178]. Hooge showed that the 1/f low-frequency noise modulated the thermal noise even with

no current flowing through the resistor [172]. This experiment demonstrates that 1/f noise is

not current-generated. Current is only needed to transform the conductivity fluctuations into

voltage fluctuations. Thermal and 1/f noise are fundamentally different. Thermal noise is a

voltage noise; therefore it does not depend on the amount of current in the resistor. In contrast,

1/f noise is a conductivity noise; therefore the voltage noise is proportional to the current in

the resistor.

Hooge’s empirical 1/f noise model, fit to observed data, predicts that the voltage noise density

is given by:

(12)

where f, N, and Vb, are frequency, total number of carriers in the resistor volume, and bias

voltage across the resistor, respectively. A non-dimensional fitting parameter, α, is ascribed to

the “quality of the lattice” and typically ranges from 10−3 down to 10−7 [56], [149], [183].

Attempts to observe the lower limit of 1/f, below which the spectrum theoretically flattens,

have not been successful [177]. Measurements down to 3 μHz (or approximately 4 days per

cycle) show a noise spectrum that is still 1/f [186]. Harley and Kenny showed that resistors

with different surface to volume ratios have the same 1/f noise characteristics, and 1/f noise

scales with the resistor volume, consistent with Hooge’s empirical equation [149].

Hooge defines 1/f noise as only those spectra with a frequency exponent of 0.9–1.1. Noise with

a different power spectral density and other frequency exponents, sometimes referred to as 1/

f-like noise, is often confused with 1/f noise and is not predicted by the Hooge equation.

According to Hooge, noise with a higher exponent, e.g., 1.5 or 2, indicates noise mechanisms

other than mobility fluctuations that should not be considered 1/f noise and are not predicted

by (12). Abnormal 1/f noise characterization can give insights into piezoresistor reliability and

failure analyses. For example, Neri [187] found that the 1/f exponent is closer to 2 in metal

traces that exhibit electromigration. Vandamme [188] showed that excess 1/f noise in

semiconductors can be attributed to small constrictions and current crowding. Devices with

constriction resistance show third harmonics and nonlinearities in their output.

Current crowding theory also explains why polysilicon has higher 1/f noise than its crystalline

counterpart [168]. At grain boundaries, small constrictions are present, thus reducing the total

number of carriers (N) and effectively increasing the 1/f noise. Basically, 1/f voltage noise does

increase linearly with the applied excitation. If the noise spectrum trends otherwise, then other

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mechanisms, such as current crowding, could be present. The noise floor of the experimental

setup may be verified by reducing the applied excitation and observing only the thermal noise

of the piezoresistor.

Reducing 1/f noise is important for low frequency applications. Chemical and bio-sensing

applications based on displacement transduction require static and low frequency

measurements and require stability over time periods of tens of seconds to many hours. Lower

1/f-noise piezoresistors are required for these applications. The fabrication process parameters

can be tailored to achieve low 1/f noise amplitude spectral densities. As suggested by Kanda’s

model, low impurity doping is often used to achieve high sensitivity. However, this model

underestimates sensitivity at high and low doping and leads to a device design that poorly

trades-off sensitivity with noise for lower frequency applications. The empirical data of Tufte

and Seltzer [79], on the other hand, offer better guidance in these regimes. The advantages of

high doping are lower noise and lower temperature coefficients for modest reduction of

sensitivity. For example, if peak doping concentration, Cpeak, decreases from 1019 cm−3 to

1017 cm−3, the sensitivity increases by only 65% while the noise increases by a factor of ten.

From (12), the 1/f noise can be reduced by increasing N, the total number of carriers dependent

on piezoresistor volume and impurity implant dose, and reducing α. Vandamme [179], [189]

showed that α depends on crystal lattice perfection and lattice quality increases with higher

temperature anneals and longer anneal times. Mallon et al. [56] extended the work of Harley

and Kenny [56], [149] and showed that long, high temperature anneals can produce lower noise

piezoresistors with low values of α (Fig. 18).

Fig. 19 shows the typical 1/f noise of a piezoresistor. The horizontal straight line is the thermal

noise of the resistor. For reference, a 1 kΩ resistor has 4 nV/√Hz thermal noise; other resistor

values are easily referenced to this value. The thermal noise of a resistor is also an excellent

source to calibrate and verify the measurement system [190]. The straight, sloped line is the

1/f noise of the resistor, which depends on the applied bias voltage. If the resistor is unbiased,

the 1/f noise disappears, while the thermal noise remains. The 1/f noise is proportional to applied

bias voltage with proportionality constant

1/f noise. Since the noise sources are uncorrelated they are additive as,

. The total noise is the sum of thermal and

(13)

III. DEVICES AND APPLICATIONS

Piezoresistors are widely used in pressure, force and inertial sensors. An external force creates

a deflection or stretch in the structure proportional to the measurand, and piezoresistance varies

proportional to the applied stress. When used in a Wheatstone bridge or other conditioning

circuit, the change in resistance is converted to change in voltage output. In this section, we

review some of the most commonly used devices that employ piezoresistive transduction

schemes in microsystems as well as common signal conditioning approaches. For brevity we

focus on seminal and representative examples of the art.

A. Cantilever Sensors

Cantilevers are beams with one free and one fixed end (Fig. 20). A piezoresistive cantilever

force sensor normally has a piezoresistor at the root of the beam, near the top surface to

maximize sensitivity. From beam mechanics, the maximum stress (σ) occurs at the outer

surface of the root (y = ±h/2, x = 0), when an external force (F) is applied at the end of a

cantilever (x = L):

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(14)

where x is the distance along the length of the cantilever measured from the root, y is the distance

along the thickness of the cantilever measured from the neutral axis, b is the width, and h is

the thickness of the cantilever.

The change in resistance is a function of the stress in the piezoresistor. The cantilever is a

ubiquitous structure in the field of micromachined transducers. Cantilevers are relatively

simple and inexpensive to fabricate, and analytical solutions of displacement profiles and stress

distributions under load are well developed [49]. Cantilever beams are commonly used as force

and displacement sensors as well as mass sensors when excited in resonance. Various schemes

can transduce the force applied to the cantilever by measuring the stress (piezoresistive) or

displacement (optical, capacitive) at any location on the cantilever.

The earliest work on integrated silicon piezoresistive cantilevers started in the late 1960s, when

Wilfinger [191] used a silicon cantilever with diffused piezoresistive elements as a

‘resonistor’ (resonator). The silicon cantilever was mechanically deflected by electrically

induced thermal expansion. The piezoresistors were used to detect the maximum stress at the

resonant frequency. Fulkerson [192] integrated a bridge and an amplifier circuit in a

microfabricated piezoresistive cantilever sensor to linearize and amplify the output, pioneering

the concept of signal conditioning integration. Numerous resonant, piezoresistive cantilever

devices have been implemented for mass sensing, chemical sensing, and inertial sensing since

that time [193]–[195].

Perhaps the best-known application of cantilevers as force and displacement sensors is in

Atomic Force Microscopy (AFM). AFM was invented by Binnig, Quate, and Gerber in 1986

as the first tool capable of investigating the surface of both conductors and insulators at the

atomic scale [196]. The first AFM combined Scanning Tunneling Microscopy (STM)

technology [197] and a stylus profilometer. This AFM used tunneling current for cantilever

displacement detection and achieved lateral and vertical resolutions of 30 Å and less than 1 Å,

respectively. Since then, other detection methods such as optical [198] and capacitive [199],

[200], have been used to detect the displacement of the AFM cantilever. However, these

methods require a sensing element external to the cantilever. In 1993, Tortonese et al. first

used piezoresistive transduction to detect AFM cantilever displacement [130]. The scheme

achieved 0.1 Årms vertical resolution in a 10 Hz–1 kHz bandwidth. Piezoresistive transduction

is attractive in its simplicity and reliability because: 1) the absence of external sensing elements

simplifies the design of an AFM for large samples and adverse environments (high vacuum,

etc.) and reduces the cost of the experimental setup; 2) the operation of the microscope is further

simplified by eliminating the need for precise system alignment; 3) piezoresistive AFM

requires low voltages and simple circuitry for operation.

Several innovations increased the visibility of piezoresistive AFM for specialized applications.

AFM piezoresistive cantilevers have been improved for parallel high-speed imaging.

Integrated actuators (thermal or piezoelectric) allowed increased bandwidth (0.6–6 kHz) by

bending the cantilever over sample topography rather than moving the sample up and down

with a piezotube [201], [202]. Brugger et al. demonstrated lateral force measurements using

surface piezoresistors on AFM cantilevers [203]. Chui et al. [122] later introduced sidewall-

implant fabrication for dual-axis piezoresistive AFM cantilever applications. The dual-axis

AFM cantilevers utilize regions with orthogonal compliance to reduce mechanical crosstalk

when an AFM cantilever is operated in a torsional bending mode and allow improved

measurement of lateral forces at the tip (Fig. 21). Brugger et al. also fabricated and tested ultra-

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