Conference Paper

A 3.1 to 5 GHz CMOS DSSS UWB transceiver for WPANs

Sony Corp., Tokyo, Japan
DOI: 10.1109/ISSCC.2005.1493945 Conference: Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International
Source: IEEE Xplore

ABSTRACT A DSSS UWB transceiver using the 3.1 to 5 GHz band is implemented in 0.18 μm CMOS and includes a programmable pulse shaping circuit in the transmitter, an LNA with a NF of 4 dB and a 6th-order active LPF with a bandwidth of 500 MHz in the receiver. Die area of the transceiver is around 9 mm2. and the transceiver consumes 105 mW in the transmit mode and 280 mW in the receive mode from a 1.8 V supply.