A CMOS 2.45-GHz radio frequency identification tag IC with read/write memory
ABSTRACT A 2.45-GHz RFID tag chip was designed on standard 0.25- μm CMOS process. Using only MOS devices, the low-Vt rectifier circuit produces 100 μW of power with 2 dBm input. The tag IC with bidirectional communication and anti-collision features can be read from a distance of up to 15 cm under a reader power of 250 mW. The die area of 0.79 mm2 includes a 128-bit rewritable non-volatile memory.
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ABSTRACT: This paper presents a fully integrated pinless wireless power supply that scavenges RF energy from the air for RFID tag powering. The chip is composed of an integrated on-chip meandering antenna with rectifier in a 130 nm CMOS technology. The generated output voltage approximately reaches 1.55 V and 700 mV from a 31 dBm EIRP source at a distance of 40 cm and 60 cm respectively at a frequency of 1.45 GHz with 20 MHz acceptable bandwidth. The antenna has a meandering shape and is optimized to have higher radiation resistance at the predetermined available area. The rectifier uses a 20-stage voltage-doubler topology to rectify the incoming power. The die area is only 4400 mum x 1500 mum.Silicon Monolithic Integrated Circuits in RF Systems, 2009. SiRF '09. IEEE Topical Meeting on; 02/2009
Conference Proceeding: Dual-power-path RF-DC multi-output power management unit for RFID tags[show abstract] [hide abstract]
ABSTRACT: A dual-power-path (DPP) RF-DC topology is employed to design the power management unit for an EPC C1 G2 RFID tag using a 0.18µm CMOS process with 7 output voltages for signal processing blocks and OTP memory. The DPP technique splits the rectifier and reconfigures the RF-DC circuits depending on the state of input power, which saves storage capacitor size without sacrificing efficiency, or alternatively, improves efficiency without additional capacitance.VLSI Circuits, 2009 Symposium on; 07/2009
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ABSTRACT: Recently, radio frequency identification (RFID) systems have gained popularity in manufacturing units, inventory, and logistics, as they represent an inexpensive and reliable solution for automatic identification. Moreover, RFID transponders are expected to become a key element in the ubiquitous computing scenario. Tags will likely be used to collect sensors data, enabling noninvasive environment monitoring. Low-cost passive UHF transponders are expected to play a major role in this context, due to extended read range capabilities. Within a passive tag, power harvested from the field irradiated by the reader during the communication should operate both digital control circuitry and potential sensing devices. Exploiting ultra-low power tag circuitry would provide sensing sections with higher energy, thus improving measurement performance. In this paper, the design of a novel circuit is presented, which implements the baseband processor of a UHF-RFID tag in compliance with the ISO 18000-6B protocol. Regardless of protocol selection issues, several power saving strategies are devised, both at the system and circuit levels, suitable for passive transponder implementation. Near-threshold operation has been exploited to attain ultra-low power consumption while keeping fair performance. A set of standard cells has been designed, suitable for the power-limited specific application. The proposed solution has been successfully checked by means of a physical implementation on CMOS 0.18 mum technology. Test chips have been characterized in terms of voltage and frequency operating range and power consumption figure has been extensively analyzed. Measurement results fully support the selected design approach: the baseband processor dissipates only 440 nW average power when operated at 800 kHz and 0.6 V. This extremely-low power consumption enables high-performance ubiquitous computing.IEEE Transactions on Very Large Scale Integration (VLSI) Systems 01/2010; · 1.22 Impact Factor