A CMOS 2.45-GHz radio frequency identification tag IC with read/write memory
ABSTRACT A 2.45-GHz RFID tag chip was designed on standard 0.25- μm CMOS process. Using only MOS devices, the low-Vt rectifier circuit produces 100 μW of power with 2 dBm input. The tag IC with bidirectional communication and anti-collision features can be read from a distance of up to 15 cm under a reader power of 250 mW. The die area of 0.79 mm2 includes a 128-bit rewritable non-volatile memory.
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ABSTRACT: The design and analytical modeling of a high effi-ciency energy harvester comprising a passive voltage-boosting network (VBN) and a switching charge pump rectifier (CPR) is presented in this paper. To improve the power conversion efficiency (PCE), the VBN increases the voltage at the input of the CPR and provides control signals for switching. Unlike traditional Schottky and diode-connected MOS transistor rectifiers, the proposed orthogonally switching CPR (OS-CPR) comprises MOS transistors as voltage-controlled switches. Analytical models for the OS-CPR are developed and presented. Circuit-level optimiza-tion techniques are employed to reduce conduction and switching losses. Simulated in a 90 nm standard CMOS technology (IBM 9RF), a 5-stage 915 MHz OS-CPR achieves a dc voltage of 1.35 V and a PCE of 11.9% with a 1 M load at dBm available input power . To show technology scalability of the design, the OS-CPR is also validated using AMS 0.18 m high-voltage (HV) CMOS technology. When benchmarked with traditional rectifiers, the OS-CPR (under similar conditions) achieves a higher PCE and a higher output dc voltage. The OS-CPR is easily scalable to operate over multiple sub-GHz ISM frequency bands.Circuits and Systems I: Regular Papers, IEEE Transactions on 03/2013; · 2.30 Impact Factor
Conference Paper: A 2.45-GHz RFID tag with on-chip antenna[Show abstract] [Hide abstract]
ABSTRACT: Powered exclusively by on-chip antenna, a 2.45-GHz RFID tag with RF read/write capabilities has been realized in 0.13-mum CMOS process. By eliminating external antenna, the 0.5-mm<sup>2</sup> tag presents a low-cost alternative for achieving high-end features such as bi-directional communication, anti-collision and rewritable memory that are attainable only with off-chip solutionsRadio Frequency Integrated Circuits (RFIC) Symposium, 2006 IEEE; 07/2006
Conference Paper: Dual-power-path RF-DC multi-output power management unit for RFID tags[Show abstract] [Hide abstract]
ABSTRACT: A dual-power-path (DPP) RF-DC topology is employed to design the power management unit for an EPC C1 G2 RFID tag using a 0.18µm CMOS process with 7 output voltages for signal processing blocks and OTP memory. The DPP technique splits the rectifier and reconfigures the RF-DC circuits depending on the state of input power, which saves storage capacitor size without sacrificing efficiency, or alternatively, improves efficiency without additional capacitance.VLSI Circuits, 2009 Symposium on; 07/2009