Conference Proceeding

Proposal of new HfSiON CMOS fabrication process (HAMDAMA) for low standby power device

Semicond. Leading Edge Technol., Inc., Ibaraki, Japan
01/2005; DOI:10.1109/IEDM.2004.1419075 ISBN: 0-7803-8684-1 pp.95 - 98 In proceeding of: Electron Devices Meeting, 2004. IEDM Technical Digest. IEEE International
Source: IEEE Xplore

ABSTRACT The authors propose a practical half-masked Damascene-like full silicidation (HAMDAMA) process to fabricate dual gate HfSiON CMOSFET in which poly-Si and fully silicided (FUSI) NiSi gates are used for n-FET and p-FET, respectively. Using this process, Ion in p-FET was improved by thinner Teff(inv) and higher hole mobility than the conventional poly-Si gate process.

0 0
 · 
0 Bookmarks
 · 
21 Views
  • Source
    Article: Challenges for future semiconductor manufacturing
    Hiroshi Iwai, Kuniyuki Kakushima, Hei Wong
    [show abstract] [hide abstract]
    ABSTRACT: The downsizing of CMOS devices has been accelerated very aggressively in both production and research in recent years. Sub-100 nm gate length CMOS large-scale integrated circuits (LSIs) have been used for many applications and five nanometer gate length MOS transistor was even reported. However, many serious problems emerged when such small geometry MOSFETs are used to realize a large-scale integrated circuit. Even at the 'commercial 45 nm (HP65nm) technology node', the skyrocketing rise of the production cost becomes the greatest concern for maintaining the downsizing trend towards 10 nm. In this paper, future semiconductor manufacturing challenges for nano-sized devices and ultra large scale circuits are analyzed. The portraits of future integration circuit fabrication and the distribution of semiconductor manufacturing centers in next decade are sketched. The possible limits for the scaling will also be elaborated.
    International Journal of High Speed Electronics and Systems 01/2005; XX:1-39.
  • Source
    Article: Ultrathin HfOxNy Gate Insulator Formation by Electron Cyclotron Resonance Ar/N2 Plasma Nitridation of HfO2 Thin Films
    Shun-ichiro OHMI, Tomoki KUROSE, Masaki SATOH
    [show abstract] [hide abstract]
    ABSTRACT: HfO x N y thin films formed by the electron cyclotron resonance (ECR) Ar/N 2 plasma nitridation of HfO 2 films were investigated for high-k gate insulator applications. HfO x N y thin films formed by the ECR Ar/N 2 plasma nitridation (60 s) of 1.5-nm-thick HfO 2 films, which were deposited on chemically oxidized Si(100) substrates, were found to be effective for suppressing interfacial layer growth or crystallization during postdeposition annealing (PDA) in N 2 ambient. After 900°C PDA of for 5 min in N 2 ambient, it was found that HfSiON film with a relatively high dielectric constant was formed on the HfO x N y /Si interface by Si diffusion. An equivalent oxide thickness (EOT) of 2.0 nm and a leakage current density of 1.0×10−3 A/cm2 (at V FB −1 V) were obtained. The effective mobility of the fabricated p-channel metal-insulator-semiconductor field-effect transistor (MISFET) with the HfO x N y gate insulator was 50 cm2/Vs, and the gate leakage current of the MISFET with the HfO x N y gate insulator was found to be well suppressed compared with the MISFET with the HfO 2 gate insulator after 900°C PDA because of the nitridation of HfO 2 .
Data provided are for informational purposes only. Although carefully collected, accuracy cannot be guaranteed. The impact factor represents a rough estimation of the journal's impact factor and does not reflect the actual current impact factor. Publisher conditions are provided by RoMEO. Differing provisions from the publisher's actual policy or licence agreement may be applicable.

Keywords

conventional poly-Si gate process
 
fabricate dual gate HfSiON CMOSFET
 
higher hole mobility
 
practical half-masked Damascene-like full silicidation