Conference Proceeding

Dynamic behavior optimization of the junctions with SIPOS layer termination

Fac. of Electr. Eng., Valahia Univ. of Targoviste, Romania
11/2004; DOI:10.1109/SMICND.2004.1403019 ISBN: 0-7803-8499-7 pp.367 - 370 vol.2 In proceeding of: Semiconductor Conference, 2004. CAS 2004 Proceedings. 2004 International, Volume: 2
Source: IEEE Xplore

ABSTRACT In the power devices domain, one of the key problem is the edge termination improving. This work proposes an optimisation of the structures with field electrode and SIPOS layer (semi-insulating polycrystalline silicon) in order to accomplish a maximum of the breakdown voltage with a smallest area consumed. For these kinds of structures physical models and some simulations regarding the dynamic behaviour are presented.

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Keywords

breakdown voltage
 
key problem
 
kinds
 
optimisation
 
SIPOS layer
 
smallest area
 
structures
 
structures physical models