Conference Paper

Novel μtrench phase-change memory cell for embedded and stand-alone non-volatile memory applications

Central R&D, STMicroelectronics, Agrate Brianza, Italy
DOI: 10.1109/VLSIT.2004.1345368 Conference: VLSI Technology, 2004. Digest of Technical Papers. 2004 Symposium on
Source: IEEE Xplore

ABSTRACT A novel cell structure for chalcogenide-based non-volatile Phase-Change Memories is presented. The new μtrench approach is fully compatible with an advanced CMOS technology, is highly manufacturable and allows to optimize array density and cell performance. Programming currents of 600 μA, endurance of 1011 programming cycles and data retention capabilities for 10 years at 110°C have been demonstrated. The manufacturability is proven by experimental results from multi-megabit arrays.

0 Bookmarks
 · 
89 Views
  • Source
    [Show abstract] [Hide abstract]
    ABSTRACT: The operation of a phase-change memory cell is studied, with special regard to programming performance, by means of analytical and TCAD numerical modeling and experimental characterization. Dependence of the reset current on geometrical properties of the heater element is analyzed through the study of heat flux from the heater element to the phase-change material. A simple electrothermal analytical model is implemented, which allows the prediction of the cell reset current value as a function of heater geometrical parameters. Analytical predictions are compared with good agreement to extensive experimental measurements. The effects of power dissipation are studied, showing that cell power efficiency strongly depends on its geometrical properties.
    IEEE Transactions on Electron Devices 01/2012; 59(2):283-291. · 2.06 Impact Factor
  • [Show abstract] [Hide abstract]
    ABSTRACT: Solid-state memory technology is undergoing a renaissance of new materials and novel device concepts for higher scalability as the mainstream technology, i.e., Flash, is approaching physical limits. Emerging memory technologies, which have unique characteristics not available in Flash, are leading transformations in the design of the memory hierarchy. Phase change memory (PCM) is a promising candidate for the next-generation nonvolatile-memory technology. It has been extensively studied for its electrical properties and material scalability. Yet, questions remain unanswered as to what extent a functional PCM cell can be ultimately scaled to and what properties a PCM cell has at the single-digit nanometer scale. In this paper, we demonstrated a fully functional cross-point PCM cell working close to its ultimate size-scaling limit by using carbon nanotubes (CNTs) as the memory electrode. The utilization of CNT electrode brings the lithography-independent critical dimension down to 1.2 nm and contributes to a large reduction of the reset programming current to 1.4 $\mu\hbox{A}$ and the programming energy to 210 fJ using a 10 ns reset pulse. Measured electrical characteristics validate the advantage of further device area scaling on reducing the programming current of PCM cells and confirm the potential viability of a highly scaled ultradense PCM array down to the bottom electrode contact area that corresponds to a 1.8 nm node technology.
    IEEE Transactions on Electron Devices 04/2012; 59(4):1155-1163. · 2.06 Impact Factor
  • [Show abstract] [Hide abstract]
    ABSTRACT: This paper investigates the multilevel behavior of phase-change random access memory devices with a dual phase-change material (PCM) stack, i.e., two PCMs stacked on one another. The dual PCM stack comprises of a Ge2Sb2Te5 (GST) layer and a top PCM layer sandwiching a SiN barrier layer. The top PCM layer was varied in three different splits: Ag0.5In0.5Sb3Te6 (AIST), Ge1Sb4Te7 (GST147), and nitrogen-doped GST (NGST). Extensive electrical characterization and statistical analysis were performed. The intrinsic properties of AIST, GST147, and NGST were used to explain the differences in electrical performances of the three multilevel device splits. The AIST/SiN/GST device split was found to have had the best electrical performance. The difference in electrical resistivities and thermal conductivities played a major role in the power consumption as well as the resistance values of the three multilevel states in these dual PCM multilevel devices.
    IEEE Transactions on Electron Devices 11/2012; 59(11):2910-2916. · 2.06 Impact Factor