Conference Proceeding

Optimization of SiCOH dielectrics for integration in a 90nm CMOS technology

IBM Res. Div., IBM T.J. Watson Res. Center, Yorktown Heights, NY, USA
07/2004; DOI:10.1109/IITC.2004.1345682 ISBN: 0-7803-8308-7 pp.54 - 56 In proceeding of: Interconnect Technology Conference, 2004. Proceedings of the IEEE 2004 International
Source: IEEE Xplore

ABSTRACT The research integration of SiCOH films in a reliable ULSI integrated circuit chip imposes many requirements on the properties of the dielectric material. This paper describes a selection and optimization process for choosing the best film to be integrated in Cu wiring levels of ULSI CMOS chips in the 90 nm technology node.

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    Article: Porous Dielectrics in Microelectronic Wiring Applications
    McGahay Vincent
    [show abstract] [hide abstract]
    ABSTRACT: Porous insulators are utilized in the wiring structure of microelectronic devices as a means of reducing, through low dielectric permittivity, power consumption and signal delay in integrated circuits. They are typically based on low density modifications of amorphous SiO2 known as SiCOH or carbon-doped oxides, in which free volume is created through the removal of labile organic phases. Porous dielectrics pose a number of technological challenges related to chemical and mechanical stability, particularly in regard to semiconductor processing methods. This review discusses porous dielectric film preparation techniques, key issues encountered, and mitigation strategies.
    Materials. 01/2010;
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Keywords

90 nm technology node
 
Cu wiring levels
 
dielectric material
 
optimization process
 
reliable ULSI
 
SiCOH films
 
ULSI CMOS chips
 

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