Conference Paper

A threshold logic synthesis tool for RTD circuits

Inst. de Microelectron. de Sevilla, CNM, Sevilla, Spain
DOI: 10.1109/DSD.2004.1333337 Conference: Digital System Design, 2004. DSD 2004. Euromicro Symposium on
Source: DBLP

ABSTRACT Functional devices and circuits based on resonant tunneling diodes (RTD) are receiving much attention since they allow high speed and/or low power operation. RTDs exhibit a negative differential resistance in their current-voltage characteristic which can be exploited to significantly increase the functionality implemented by a single gate in comparison to other technologies. In particular, they have proven to efficiently implement threshold gates which are a generalization of conventional Boolean gates. Suitable logic synthesis tools are required to handle these complex building blocks in order to translate the advantages of this emergent technology to the circuit and system levels. This paper describes an efficient approach to the automatic design of networks of threshold gates from functional specifications. Results for widely used logic functions and standard benchmark circuits are reported.

  • Source
    [Show abstract] [Hide abstract]
    ABSTRACT: In this paper, a novel method to identify threshold logic functions (TLF) is proposed. Threshold logic is a promising alternative to conventional Boolean logic that has been recently revisited due to the suitability to emerging technologies, such as QCA, RTD, SET, TPL and spintronics. Identification and synthesis of TLF are fundamental tasks for the development of circuit design flow based on such logic style. The proposed method exploits both the order of Chow parameters and the system of inequalities, extracted from a function, to assign optimal variable weights and optimal threshold value. It is the first heuristic algorithm that does not uses integer linear programming (ILP) able to identify all threshold functions with up to five variables. Moreover, it also identifies more functions than other related heuristic methods when the number of variables is higher than five. The proposed algorithm is scalable, since the average execution time is less than 1 ms per function. Furthermore, the method always assigns the minimum weights, resulting in circuits with minimum area.
    Integrated Circuits and Systems Design (SBCCI), 2013 26th Symposium on; 01/2013
  • [Show abstract] [Hide abstract]
    ABSTRACT: Electronic and biological systems both perform complex information processing, but they use very different techniques. Though electronics has the advantage in raw speed, biological systems have the edge in many other areas. They can be produced, and indeed self-reproduce, without expensive and finicky factories. They are tolerant of manufacturing defects, and learn and adapt for better performance. In many cases they can self-repair damage. These advantages suggest that biological systems might be useful in a wide variety of tasks involving information processing. So far, all attempts to use the nervous system of a living organism for information processing have involved selective breeding of existing organisms. This approach, largely independent of the details of internal operation, is used since we do not yet understand how neural systems work, nor exactly how they are constructed. However, as our knowledge increases, the day will come when we can envision useful nervous systems and design them based upon what we want them to do, as opposed to variations on what has been already built. We will then need tools, corresponding to our Electronic Design Automation tools, to help with the design. This paper is concerned with what such tools might look like.
    Design Automation Conference (DAC), 2012 49th ACM/EDAC/IEEE; 01/2012
  • [Show abstract] [Hide abstract]
    ABSTRACT: Threshold logic has been known as an alternative representation of Boolean logic due to its compactness characteristic. Recently, the developments in advanced nanotechnologies have also promised efficient implementations of threshold logic gates. Thus, many synthesis methodologies for threshold logic circuits have been proposed. Since threshold logic has a different mechanism in functional evaluation compared to the traditional Boolean logic, a threshold logic gate can represent a more complex function. As a result, the sensitization criterion in threshold logic circuits is also different. In this work, we propose a sensitization criterion for threshold logic circuits, and show its application to the static timing analysis problem. The experimental results show the accuracy of the proposed criterion.
    Computer-Aided Design (ICCAD), 2013 IEEE/ACM International Conference on; 01/2013


1 Download
Available from