Conference Paper

A power constrained simultaneous noise and input matched low noise amplifier design technique

Inf. & Commun. Univ., Daejeon, South Korea
DOI: 10.1109/ISCAS.2004.1328995 Conference: Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on, Volume: 4
Source: IEEE Xplore

ABSTRACT In this paper, very simple and insightful sets of noise parameters expressions for a power-constrained simultaneous noise and input matching (PCSNIM) CMOS LNA design technique are newly introduced. Based on the noise parameters expression, the design principle, advantages, and limitations are clearly explained. The proposed LNA is optimized for low voltage, low power 900 MHz Zigbee applications based on 0.25 μm CMOS technology. Measurement results show a power gain of 12 dB, NF and NFmin of 1.35 dB, and IIP3 of -4 dBm while dissipating the DC current of 1.6 mA (only 0.7 mA for NMOS transistor) at a supply voltage of 1.25 V.

1 Bookmark
  • [Show abstract] [Hide abstract]
    ABSTRACT: An integrated 1.5 GHz low power Low Noise Amplifier (LNA) for portable global positioning system (GPS) receivers is proposed based on SMIC 180 nm 1P6M RF CMOS process. The MOS transistors in the proposed LNA are biased in moderately inverted region to achieve low power. The post-layout simulation results show that, at worst case, a voltage gain of 19 dB is achieved with noise figure (NF) of 4.2 dB, an input third order intermodulation point (IIP3) of -14 dBm and an input return loss of -8 dB. The power consumption of the circuit is only 1 mW at supply voltage of 0.7 V. The ratio of gain to dc power consumption is 19 dB/mW.
  • [Show abstract] [Hide abstract]
    ABSTRACT: A 1.2~1.6 GHz low power single-ended input to differential output low noise amplifier for Global Navigation Satellite System (GNSS, such as GPS, Galileo, China Compass, etc.) is proposed in the paper. A new current-reused technique with mismatch adjustment is adopted to achieve low power, low noise factor, high voltage gain and low mismatch simultaneously. The LNA is fabricated in TSMC 0.18 μm RF CMOS process, with only 2 mA current consumption under 1.8 V supply. The LNA exhibits a differential voltage gain of 27-30 dB, a noise figure of 2.4-3.0 dB and gain mismatch less than 0.5 dB.
    International Symposium on Circuits and Systems (ISCAS 2010), May 30 - June 2, 2010, Paris, France; 01/2010