Coordinating concurrency to avoid forbidden states in condition models
Dept. of Electr. Eng., Kentucky Univ., Lexington, KY, USADOI: 10.1109/ETFA.2003.1247692 Conference: Emerging Technologies and Factory Automation, 2003. Proceedings. ETFA '03. IEEE Conference, Volume: 1
Source: IEEE Xplore
This paper presents a new way of avoiding and getting around forbidden states in condition models that are used in automated control synthesis of manufacturing systems. The desired high-level behavior of the system is specified by a condition system Petri net called the "Specnet". The forbidden states are defined by a condition system Petri net called "Forbidden condition net". Our manufacturing system is defined by a set of interacting components, which are specified by component models. The high level Spec net is analyzed by a software tool, which converts it to an executable file, which is input to the controller, to control the manufacturing system. In this paper we introduce a new method to avoid and get around forbidden states, by taking the Specnet and the Forbidden condition net as inputs and analyzing the Specnet for the reachability of Forbidden markings, making necessary changes automatically (if needed) in the Specnet, to avoid reaching Forbidden markings, while maintaining the desired high level behavior of the system as defined by the original Specnet.
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Conference Paper: Elaborative orderings of condition languages[Show abstract] [Hide abstract]
ABSTRACT: Considers condition languages, where the language specifically specifies sequences of system inputs and outputs that are true, rather than just indicating the changes as events. This avoids the potential state explosion of the commonly found event-based automata, which must keep track of the current state of the system inputs through its own state. We introduce an elaborative ordering, which is used to compare the amount of detail among sequences. This allows us to clearly relate the detailed closed-loop condition language of a system to high-level, less-detailed sequences specifying desired behaviorsDecision and Control, 1998. Proceedings of the 37th IEEE Conference on; 01/1999
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ABSTRACT: Automated control synthesis methods for discrete-event systems promise to reduce the time required to develop, debug, and modify control software. Such methods must be able to translate high-level control goals into detailed sequences of actuation and sensing signals. In this paper, we present such a technique. It relies on analysis of a system model, defined as a set of interacting components, each represented as a form of condition system Petri net. Control logic modules, called taskblocks, are synthesized from these individual models. These then interact hierarchically and sequentially to drive the system through specified control goals. The resulting controller is automatically converted to executable control code. The paper concludes with a discussion of a set of software tools developed to demonstrate the techniques on a small manufacturing systemIEEE TRANSACTIONS ON CYBERNETICS 11/2000; 30(5-30):696 - 712. DOI:10.1109/3477.875446 · 6.22 Impact Factor
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