Conference Paper

A CMOS multi-channel 10Gb/s transceiver

Fujitsu Labs. Ltd., Kawasaki, Japan
DOI: 10.1109/ISSCC.2003.1234212 Conference: Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE International
Source: IEEE Xplore


A quad 10Gb/s transceiver in 0.11μm CMOS communicates electric signals over balanced copper media. The transceiver uses a single 1.2V power supply and dissipates 415mW per channel. One PLL supplies a reference clock to two transmitter channels and two receiver channels. The transceiver contains analog front ends, clock recovery units, and 312MHz parallel interfaces.

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