A 750 mW class G ADSL line driver with offset-controlled amplifier hand-over
ABSTRACT This paper discusses the design of a high-efficiency ADSL line driver and reports some experimental results. The driver is a Class G power amplifier implementing a modified version of the architecture widely employed in hi-fi audio applications. The proposed architecture is based on two amplifiers operated in parallel and powered by different supply voltages (±5 V and ±12 V). The low-voltage amplifier operates on low-level input signals, whereas the high-voltage section processes the peaks of the ADSL signal. The hand-over between the low-voltage and the high-voltage amplifier is determined by a dead zone purposely introduced in the I/O characteristic of the high-voltage amplifier. This solution allows a smooth transition between lowand high-voltage operation, providing better distortion performances than the classical Class G scheme with series connected output devices. By this solution, low power consumption is achieved (750 mW with passive line impedance matching) with a distortion performance similar to the one achieved by conventional Class AB schemes. The circuit was designed in a 0.8 μm BCD technology.
Conference Proceeding: SOPA: A high-efficiency line driver in 0.35 μm CMOS using a self-oscillating power amplifier[show abstract] [hide abstract]
ABSTRACT: Recently, with development of xDSL technologies, design of line drivers regains attention since the thermal limitation at the central office side (CO) demands high-efficiency line drivers. This specification becomes more severe since for the ADSL standard Discrete Multi Tone (DMT) modulation is chosen. DMT signals have a high crest factor (CF=V<sub>max</sub>/V<sub>min</sub>) and demand a highly-linear line driver. Since efficiency of a class AB line driver ideally is inverse proportional to the CF, the efficiency of this type of line driver is low in DMT-based applications. When implementing a line driver in a mainstream CMOS technology, decreasing supply voltage increases this problem, since a higher quiescent current is necessary to maintain the same distortion levels. This paper depicts the principle of the differential self-oscillating power amplifier (SOPA)Solid-State Circuits Conference, 2001. Digest of Technical Papers. ISSCC. 2001 IEEE International; 02/2001
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ABSTRACT: This paper presents the design of a high-efficiency line driver for central-office ADSL modems. This driveris a modification of the conventional class-G architecture already in use for hi-fi audio applications and it isbased on two amplifiers operating in parallel and powered by different power supplies (5 V and12 V). The low-voltage amplifier is active with low-level input signal, while the high-voltageamplifier is used for processing the peaks of the DMT signal. By means of this solution and by properly interfacingthe two amplifiers, high efficiency is achieved while maintaining a harmonic distortion similar to the one achievedby conventional class-AB schemes and compatible with the ADSL requirements. The circuit was designed in a 0.8-mBCD technology.Analog Integrated Circuits and Signal Processing 12/2002; 34(1):59-69. · 0.55 Impact Factor
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ABSTRACT: A CMOS differential line-driver amplifier that uses positive feedback in the input stage to give transconductance multiplication and pole-zero doublet insertion is reported. The gain-bandwidth product at 60 kHz is 30 MHz and the unity-gain frequency is 2.7 MHz. The circuit operates from a single 5-V power supply and can achieve a total harmonic distortion (THD) of -78 dB for a 6- V <sub>pp</sub> differential output signal at 40 kHz and for a load of 100 Ω and/or 150 pF. For the same measuring condition but with a load of 50 Ω and/or 150 pF, the THD is -73 dB. A power supply rejection of more than 76 dB up to 150 kHz was obtained. The chip occupies an area of 1200 mil<sup>2</sup> in a 1.5-μm CMOS technology and dissipates 20 mWIEEE Journal of Solid-State Circuits 01/1992; · 3.06 Impact Factor