We describe a very short channel, 0.15 μm, LDMOS transistor, with a breakdown voltage of up to 45 V, manufactured in a standard 0.35 μm BiCMOS process. At 1900 MHz and a 12 V supply voltage the 0.4 mm gate width device gives 100 mW output power P1dB at a drain efficiency of 43%. It has a transducer power gain of more than 20 dB and a current gain cutoff frequency, fT, of 13 GHz. The maximum available gain cutoff frequency, fMAX, is 27 GHz. The LDMOS process module does not affect the performance or models of other devices. We present for the first time a simple way to create high voltage, high performance LDMOS transistors for RF power amplifier use even in a very downscaled silicon technology.
[Show abstract][Hide abstract] ABSTRACT: Next-generation high data rate wireless communication systems offer completely new ways to access information and services. To provide higher data speed and data bandwidth, RF transceivers in next-generation communications are expected to offer higher RF performance in both transmitting and receiving circuitry to meet quality of service. The semiconductor device technologies chosen will depend greatly on the tradeoffs between manufacturing cost and circuit performance requirements, as well as on variations in system architecture. It is hard to find a single semiconductor device technology that offers a total solution to RF transceiver building blocks in terms of system-on-chip integration. The choices of device technologies for each constituent component are important and complicated issues. We review the general performance requirement of key components for RF transceivers for next-generation wireless communications. State-of-the-art high-speed transistor technologies are presented to assess the capabilities and limitations of each technology in the arena of high data rate wireless communications. The pros and cons of each technology are presented and the feasible semiconductor device technologies for next-generation RF transceivers can be chosen upon the discretion of system integrators.
Proceedings of the IEEE 03/2004; 92(2-92):354 - 375. DOI:10.1109/JPROC.2003.821903 · 4.93 Impact Factor
[Show abstract][Hide abstract] ABSTRACT: The new approach of implementing a laterally diffused metal-oxide-semiconductor (LDMOS) with In<sub>0.53</sub>Ga<sub>0.47</sub>As is investigated. Power device parameters such as specific on-resistance, gate charge, and breakdown voltage are examined using 2-D device simulation. Comparisons are made between In<sub>0.53</sub>Ga<sub>0.47</sub>As and Si LDMOS, showcasing the advantages of In<sub>0.53</sub>Ga<sub>0.47</sub>As LDMOS. Further ON-state analysis of the In<sub>0.53</sub>Ga<sub>0.47</sub>As LDMOS is then provided with a proposed enhanced structure that demonstrates excellent I-V characteristics.
IEEE Transactions on Electron Devices 02/2011; 58(1-58):180 - 189. DOI:10.1109/TED.2010.2089460 · 2.47 Impact Factor
[Show abstract][Hide abstract] ABSTRACT: In this paper, a two-stage 2.4 GHz power amplifier (PA) using the high-breakdown-voltage asymmetric NMOSFETs was implemented in a 0.18-μm CMOS technology. In this process, the conventional NMOSFETs have a drain-to-source breakdown voltage (BVdss) about 3.5V, therefore restricting the available output power in PA designs. However, by using the special asymmetric NMOSFETs in the proposed PA, the circuit can safely operate at a supply voltage from 1.8 to 2.75V. Under a 2.75V operation, good power performances include a power gain of 20.4 dB, an output 1-dB compression point (Pout, 1dB) of 21.5dBm and a power-added-efficiency (PAE) of 29.6%.
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