Conference Paper

A novel 6.4 μm2 full-CMOS SRAM cell with aspect ratio of 0.63 in a high-performance 0.25 μm-generation CMOS technology

Samsung Electron. Co. Ltd., Yongin-City
DOI: 10.1109/VLSIT.1998.689202 Conference: VLSI Technology, 1998. Digest of Technical Papers. 1998 Symposium on
Source: IEEE Xplore


Summary form only given. A unique 6.4 μm2 6Tr. SRAM
cell has been developed using an advanced CMOS technology implemented in
0.25 μm design rule for high density and high speed applications.
Very small aspect ratio of 0.63 has been achieved for the cell design.
Special features in the layout are parallel active regions and
orthogonal gate electrodes, all bar shape. Stable cell operation has
been obtained at 0.5 V

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