S-parameters characterization of through, blind, and buried via holes

Dept. of Electr. Eng., L'Aquila Univ., Italy
IEEE Transactions on Mobile Computing (Impact Factor: 2.91). 05/2003; 2(2):174- 184. DOI: 10.1109/TMC.2003.1217237
Source: IEEE Xplore

ABSTRACT A method for de-embedding the scattering parameters matrix for single-end or differential through, buried, and blind via holes in multilayer printed circuit boards for high-speed digital applications is presented. The proposed technique starts from a measurement or simulation of the structure containing the discontinuity and, after the structure's partitioning, extracts the scattering parameters of the required discontinuity. The procedure is applied to different kinds of single-ended and differential via holes and is validated by measurements. The finite integration technique is used to perform the needed three-dimensional electromagnetic simulations. Due to its reduced CPU time, the proposed methodology is suitable for a parametric analysis on the electrical performance of the via hole discontinuities and it gives useful results for the extraction of accurate computer-aided design models.

1 Bookmark
  • [Show abstract] [Hide abstract]
    ABSTRACT: In the multilayered printed circuit board (PCB), the signal transmission between different layers occurs by way of through hole structure. The geometry of a through hole consists of traces, pads and a perfectly conducting hollow cylinder. Conductive Anodic Filament (CAF) generated easily in PCB when board size is decreased. CAF produced will lead to leakages or short circuit. Many reasons cause the phenomenon of the CAF, one of them is the voltage. In these situations, the signal transmission integrity is concerned. The excessive capacitance is generated near the through hole structure. Such capacitance influences the signal transmission between different layers. A number of factors can cause excessive capacitance, for example: geometry of transmission line, pad of through hole and the interaction of different layers. However, recent application of the multilayered printed circuit board such as cell phones and note books, have decreased the broad size for easy to carry or load more equipment. Decreasing the size of PCB, the excessive capacitance near the through hole structure is inevitable. It is more important to design the complexity of the layout and the geometry of structure. The quick and efficient prediction of the performance is concerned when manufacturing process become more complicated. The simulation model and problem discussion are the subject of this paper. In this study, we demonstrate that the geometry of the transmission line near the through hole may affect the transmission of the signal by excessive capacitance. By using ANSYS 12 to simulate the high frequency electromagnetism, and simulate the transmission line with different shapes near the through hole and extract the Scattering-parameters from the simulation results. Scattering-parameters are used to describe the electrical behavior of linear electrical network. The parameters are helpful for us to design electrical engineering, electronics engineering, and communication systems, and especial- y for microwave engineering. By comparing Scattering-parameters of different structures, we can understand the signal transmission and reflectivity between two layers. We also analyze the electric field and magnetic field of the structure, and use a method based on the quasi-static approximation to compute the excessive capacitance of the through hole structure. Using the concept of equivalent circuit to convert the original model into the RLC circuit. Equivalent circuit is divided into multiple series parts. Many parameters such as resistance, capacitance, inductance and characteristic impedance will be discussed, then compare these value changes between different shapes of the transmission line near the through hole. The ANSYS model is proposed to simulate the high-frequency electromagnetic of the structure. By these model, we want to predict the signal transmission performance of the through hole structure.
    Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT), 2012 7th International; 01/2012
  • Source
    [Show abstract] [Hide abstract]
    ABSTRACT: Characterization of on-wafer vias using a 0.18-μm RF CMOS technology is presented. Equivalent resistance and inductance of a single via and multiple vias with different physical arrangements are extracted from full wave simulations up to 30 GHz. An equivalent circuit model with frequency-independent components is proposed to model the frequency-dependent characteristics of the vias. © 2008 Wiley Periodicals, Inc. Microwave Opt Technol Lett 50: 713–715, 2008; Published online in Wiley InterScience ( DOI 10.1002/mop.23173
    Microwave and Optical Technology Letters 01/2008; 50(3):713 - 715. DOI:10.1002/mop.23173 · 0.59 Impact Factor
  • [Show abstract] [Hide abstract]
    ABSTRACT: In the high-speed PCB design, vias has become one key structure of interconnection lines, vias equivalent to a discrete structure of the signal transmission path, lead to signal reflection, attenuation and other signal integrity issues. In this paper, vias model established through 3D electromagnetic analysis software HFSS, the effects of factors of the ground vias around signal vias such as size, number and location on high-speed signal transmission performance are investigated, respectively. The results obtained demonstrate that the signal transmission quality is better with larger diameter of ground vias; the signal transmission quality is better with smaller distance between ground vias and signal vias; the more the number of ground vias, the better signal transmission quality.

Full-text (2 Sources)

Available from
May 28, 2014