Article

Mechanism of Electron Trapping and Characteristics of Traps in HfO2 Gate Stacks

SEMATECH, Austin
IEEE Transactions on Device and Materials Reliability (Impact Factor: 1.54). 04/2007; DOI: 10.1109/TDMR.2007.897532
Source: IEEE Xplore

ABSTRACT Electron trapping in high- gate dielectrics under constant voltage stress is investigated. It is suggested that the electron trapping occurs through a two-step process: resonant tunneling of the injected electron into the preexisting defects (fast trapping) and thermally activated migration of trapped electrons to unoccupied traps (slow trapping). Characteristics of the electron traps extracted based on the proposed model are in good agreement with the calculated properties of the negatively charged oxygen vacancies. The model successfully describes low-temperature threshold voltage instability in NMOS transistors with /TiN gate stacks.

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