IEEE TRANSACTIONS ON ADVANCED PACKAGING, VOL. 22, NO. 3, AUGUST 1999 499
Characterization of Thin Film Tantalum Oxide
Capacitors on Polyimide Substrates
Gabriel Morcan, Simon S. Ang, Senior Member, IEEE, Timothy Lenihan, Senior Member, IEEE,
Leonard W. Schaper, Fellow, IEEE, and William D. Brown, Senior Member, IEEE
Abstract—Thin film tantalum oxide capacitors were fabricated
on flexible polyimide substrates and characterized. The capaci-
tance and dielectric constant were found to be independent of
frequency from 100 MHz–1 GHz. The leakage current–voltage
(? ? ?–? ? ? ) characteristics of the virgin tantalum oxide capacitors were
erratic. Both current-induced and temperature-induced anneal-
ing effects on virgin capacitors were observed. It was found that
the defects of the capacitors depend, not only on the tantalum
oxide dielectric, but also on the underlying electrode. Copper
particulates embedded in the bottom electrode were the primary
cause of electrical shorts. The conduction mechanism was found
to be ionic. The ionic conduction activation energies are linearly
dependent on the applied electric field, ranging from 0.47 eV for
an electric field of 0.13 MV/cm to 0.38 eV for 0.73 MV/cm.
Index Terms— Defects, polyimide substrate, tantalum oxide,
thin film capacitor.
capacitors, traditionally mounted on the substrate surface,
and embed them in the substrate. Furthermore, thin film
capacitors embedded in polyimide substrates are needed for
high-frequency and high component count MCM applications
in telecommunications and computers. Embedded capacitors
not only have lower parasitics, but also a reduced form factor
when compared to surface mounted chip capacitors. To achieve
a high capacitance, dielectrics with a high dielectric constant
and low dielectric loss, such as tantalum oxide and barium
titanate, have been investigated as a potential dielectric for
embedded capacitors –.
In this paper, the characterization of tantalum oxide ca-
pacitors embedded in a flexible substrate is reported. The
capacitance and leakage current data of the capacitors are
presented. The conduction mechanism and its associated ac-
tivation energies are also determined. Furthermore, defects
associated with the capacitors are analyzed and discussed.
N ORDER to improve the packaging density of multi-
chip modules (MCM’s), it is desirable to remove discrete
Manuscript received May 6, 1998; revised April 29, 1999. This work was
supported by the Defense Advanced Research Projects Agency (MDA972-
93-1-0036) and Sheldahl, Inc. The information contained herein does not
necessarily reflect the position or the policy of the government and no official
endorsement should be inferred.
G. Morcan, S. S. Ang, L. W. Schaper, and W. D. Brown are with
the Department of Electrical Engineering, High-Density Electronics Center,
University of Arkansas, Fayetteville, AR 72701.
T. Lenihan is with Sheldahl, Inc., Northfield, MN 55057.
Publisher Item Identifier S 1521-3323(99)06236-X.
A. Capacitor Fabrication
Fig. 1 shows the structure of the floating plate capacitors
fabricated for this study using a three photomask process. The
capacitors vary in size from 1
capacitance values ranging from 1 pF to 41 nF, respectively
. The base material is a flexible polyimide sheet, 50
thick. The bottom plate of the capacitor is a sputtered blanket
m thick copper. A 0.5
oxide is reactively sputtered onto the lower electrode. Reactive
sputtering of the dielectric is performed at 5 mT using a
tantalum target in an argon and oxygen (partial pressure of
1 mT) ambient.
To achieve high capacitance values, it is desirable to have
a thin dielectric layer. On the other hand, the thickness of the
dielectric must be adequate for proper step coverage of the
bottom plate of the capacitor to prevent electrical shorting of
the electrodes. The copper top plate is sputtered, patterned,
and etched to create individual floating plate capacitors of
10cm to 2.9 cm and have
m thick layer of tantalum
B. Electrical Characterization
To determine the properties and performance of the dielec-
tric at high frequencies, the capacitance was directly measured
using a Hewlett-Packard HP4291A impedance/material ana-
lyzer over the frequency range from 100 MHz to 1.1 GHz.
This frequency range was used to ensure the highest mea-
surement accuracy. The HP4291A was connected to a low
impedance test head from which a 50
to a 150
m pitch microprobe (from Cascade Microtech) to
probe the capacitor. A calibration of the impedance analyzer
was performed to improve the measurement accuracy. At the
connector of the low impedance test head, a calibration kit
consisting of a zero ohm load, an open, a 50
a low-loss capacitor was used to perform the calibration. At
the microprobe tips, a fixture compensation was performed
using an impedance standard substrate to ensure measurement
accuracy from the low impedance test head to the tips of
the microprobe. The calibration is used by the impedance
analyzer to eliminate parasitic components associated with the
The leakage current of the capacitors was measured using a
Hewlett Packard HP-4140B pA Meter/DC Voltage Source. The
HP4140B was connected to a probing station with one probe
cable was routed
1521–3323/99$10.00 1999 IEEE
500IEEE TRANSACTIONS ON ADVANCED PACKAGING, VOL. 22, NO. 3, AUGUST 1999
Fig. 1.Structure of the tantalum oxide floating plate capacitor.
applying the positive voltage on the top electrode and the sec-
ond probe measuring the current at the bottom electrode. The
current–voltage (I–V) measurements were performed using a
medium integration time and a ramped voltage source. The
voltage source was ramped from 0–40 V with a 0.2 V step
voltage and a 1–5 s delay time.
The leakage current versus applied voltage measurements
were made as a function of temperature to determine the
carrier conduction mechanism and activation energy of the
tantalum oxide dielectric. The probing station with the sample
was placed in an oven and the temperature was increased from
room temperature (
30 C) to 110 C in 10 C increments.
A soak time of five minutes at each temperature was used
before each measurement.
C. Induced Failure Sites Experimental Setup
To determine the probable cause of failure in the capacitors,
a simple but effective experimental procedure was imple-
mented. First, the capacitors were stressed by an electric field
which exposed and identified the failure sites of defective ca-
pacitors. Then, the top copper electrodes of the capacitors were
etched away to expose the dielectric. Finally, the identified
failure sites were examined for possible cause(s) of failure.
A dc power supply was used to induce the failures in the
capacitors. Before a voltage was applied, a coating of water-
based red dye containing propylene glycol and surfactant was
applied to the top electrode of the capacitor. As the voltage
was increased, any electrically weak spot between the top
and bottom electrodes of the defective capacitors conducted a
substantial current and the liquid dye changed color and boiled
due to the heat created. The applied voltage at this point was
crucial, and if it was increased further, the increase in current
burned out the defect and destroyed it. The applied voltage
was turned off prior to total destruction of the failure site.
This defect stressing procedure was observed under a mi-
croscope, and once a capacitor with a current leakage site was
detected, the site was marked by scribing a circle around it.
Some defective capacitors exhibited many failure sites, but
capacitors with only one failure site were chosen for further
examination. After the liquid dye was washed off, the top
electrode of the capacitor was removed using a copper etching
solution, exposing the dielectric layer. The failure sites were
easily identified after removing the top electrode. To examine
the defect sites, samples containing the defect areas were cut
out of the test vehicle. A thin layer of gold was sputtered onto
the surface of the dielectric and examined under a scanning
electron microscope (SEM).
III. DISCUSSION OF RESULTS
A. Capacitance Versus Frequency Characteristics
Fig. 2 shows typical capacitance versus frequency data
for tantalum oxide capacitors of different areas. As can be
seen, the capacitance is relatively constant over the measured
frequency range indicating that the properties of the tantalum
oxide dielectric are uniform at these test frequencies. Using the
capacitance data, the dielectric thickness, and the area of the
electrodes, the relative dielectric constant was calculated to be
about 21 over the frequency range from 100 MHz to 1.1 GHz.
Another characteristic, the capacitive density was calculated
using the measured capacitance and the area of the capacitor.
The capacitance density was calculated to be 45 nF/cm .
MORCAN et al.: CHARACTERIZATION OF THIN FILM TANTALUM OXIDE CAPACITORS501
Fig. 2.Capacitance versus frequency for tantalum oxide capacitors of different areas.
B. Annealing Effects
Prior to the leakage current experiments, an annealing effect
was observed for the capacitors. It was observed that a four
hour anneal at 200 C in air slightly lowers and stabilizes
the capacitive density. The effects of annealing were further
supported by leakage current measurements performed on the
capacitors. Annealing could be affected either by an applied
current or by exposure to elevated temperatures.
1) Leakage Current Induced Annealing: When a capacitor
was first measured to determine the leakage current, it was
noted that as the applied voltage was increased, the increase in
leakage current was erratic, abruptly increasing or decreasing,
although the general trend was increasing. By performing the
(I–V) measurement a second time on the same capacitor, a
significant improvement in the smoothness of the leakage
current curve was achieved, as shown in Fig. 3 for two
capacitors, CapA and CapB. The capacitors had an area of
10 cm with a measured capacitance value of 728
pF. The curves labeled CapA-1 and CapB-1 are the first-pass
leakage current measurement data for the capacitors. As can
be seen, the initial leakage current data are erratic and contain
many spikes indicating that, with a slight increase in applied
voltage, the current either increases or decreases abruptly and
randomly. However, the currents are much smoother and the
spikes associated with the first-pass data are absent during
subsequent measurements as shown by CapA-2 and CapB-2
for a second pass. All capacitors exhibited this erratic current
behavior when measured the first time. However, the
characteristics always resembled the second pass data for
The observed erratic behavior of the leakage current of
virgin capacitors suggests that either local annealing of the
tantalum oxide dielectric is occurring or tantalum oxide defects
are burned out as current increases. It is possible that, while the
defects referred to previously do not result in a short between
the electrodes of the capacitor when a voltage is applied, local
heating due to current conduction is sufficient to anneal the
dielectric around these defects.
2) Temperature Exposure Induced Annealing: If
heating of defects causes local annealing, then it should be
possible to anneal the tantalum oxide dielectric by heating. To
verify this, the capacitors were annealed at 200 C for four
hours in an air ambient. The leakage current of the capacitors
was measured before and after the temperature anneal. Fig. 4
– characteristics taken before (labeled BTA) and
after (labeled ATA) thermal annealing for two capacitors that
were previously stressed with an electric field. The after-
– plots not only are smoother, but the
leakage currents are also lower.
C. Dielectric Surface and Composition Evaluation
Before the top electrodes of the capacitors were deposited,
various samples of the dielectric film were examined us-
ing atomic force microscopy (AFM) and scanning electron
microscopy (SEM) techniques. These examinations were per-
formed to better understand the surface topology and compo-
sition of the tantalum oxide dielectric. The samples examined
consisted of the polyimide base film, bottom copper electrode,
and a 0.5
m layer of sputtered tantalum oxide. The samples
were first examined with the AFM, after which they were
sputter coated with a thin layer of gold and examined with the
SEM. The same areas were examined using both techniques
and the results were in good agreement. It should be noted
that the search for defects in the tantalum oxide was time
consuming because of the difficulty in locating them.
502IEEE TRANSACTIONS ON ADVANCED PACKAGING, VOL. 22, NO. 3, AUGUST 1999
Fig. 3.Effects of current annealing on tantalum oxide capacitors.
Fig. 4. Effects of temperature annealing on tantalum oxide capacitors.
1) Dielectric Defects: Surface defect areas were found to
be randomly distributed across the surface of the tantalum
oxide film. The samples examined either had one or two
defects in any given area or a cluster of defects scattered across
the surface of the film. A cluster of defects consisting of many
large and small boulder-like defects that seem to be embedded
MORCAN et al.: CHARACTERIZATION OF THIN FILM TANTALUM OXIDE CAPACITORS503
Fig. 5. SEM photograph of a larger cluster of defects.
Fig. 6. SEM photograph of a large boulder defect.
in the dielectric layer is shown in Fig. 5. The SEM picture was
taken at a 45 tilt. A cluster can extend up to 80 or 100 mm in
diameter and each of the larger boulders examined measured
2–3 mm in diameter and 0.4–0.5 mm in height.
A closer examination of an individual boulder, shown in
Fig. 6, was performed. This defect was also photographed at
tilt. Using AFM techniques, the defect was found to
be 4.2 mm across and 1.5 mm high. This defect is larger
than most of the defects examined. The defect appears to be
embedded in the dielectric layer with an indentation in the
dielectric encircling the entire defect.
2) Chemical Composition of Defects: To
chemical composition of the boulder defects found on the
surface and embedded in the dielectric layer, two different
techniques were used. A simple defect decorating experiment
was used in an attempt to etch away the defect. EDX was also
used to determine the chemical composition of the defects
remaining after etching.
504IEEE TRANSACTIONS ON ADVANCED PACKAGING, VOL. 22, NO. 3, AUGUST 1999
Fig. 7. Tantalum oxide layer delaminating from the bottom copper electrode.
From AFM and SEM analyzes, it was determined that the
boulder defects probably caused the capacitors to break down
by providing a low resistive path shorting the top electrode
to the bottom electrode, implying that they conduct current.
This suggested that the defects were metallic. Samples with
defects were placed in a copper etching solution. Fig. 5 shows
an etched hole in the dielectric at the left center. Within this
cluster of defects, one of the boulders was affected by the
etching solution and was either chemically consumed or the
solution etched away the boulder’s base and the boulder fell
out of the dielectric.
A second possibility is the most likely since not all of the
boulders were affected equally by the etching solution, and
only one or two boulders in a cluster of defects were removed
by the chemical etching. This leads to the conclusion that
most of the boulders have a tantalum oxide covering that is
unaffected by the metal etching solution. Also, it is believed
that the boulders with the largest crevice at the dielectric
surface, as seen at the base of the boulder in Fig. 6, are the
most likely to be affected by the etching solution. This would
occur if the etching solution entered the crevice and attacked
the boulder and bottom metal from the underside.
Preliminary EDX characterization was performed by ex-
amining the tantalum and oxygen content of the dielectric
and remaining boulder surfaces. The data revealed that the
tantalum and oxygen content of the surfaces examined were
equal, implying that the amount of tantalum and oxygen
are equal over the entire surface of the samples. This EDX
characterization further indicated that the boulder surface has
a tantalum oxide covering of the same composition as the rest
of the dielectric layer. This is possible since reactive sputtering
of tantalum oxide dielectric is a conformal coating process.
Since the observed defects were not metallic, the possibility
that the defects were part of the metal electrode was investi-
gated. The dielectric was removed from part of the surface of a
sample, exposing the surface of the bottom copper electrode.
The exposed electrode is shown in the bottom half of the
photograph in Fig. 7, and the delaminated dielectric layer on
top of the copper is shown in the upper half of the photograph.
The photograph was taken at a 75 tilt.
The exposed copper electrode clearly shows that the defects
are present in the copper layer. Thus, the boulder-like defects
observed in the dielectric layer are the result of conformal
deposition of the tantalum oxide dielectric. A closer exam-
ination of the two defects closest to the dielectric layer is
shown in Fig. 8. The photograph was taken at a 45 tilt, and
it clearly shows that they are embedded in and protruding
above the bottom copper electrode. The indentation encircling
the boulders can also be seen at the copper level and explains
the presence of a similar groove at the dielectric surface.
An EDX analysis was performed to verify that the embed-
ded boulders were copper and not another form of contami-
nation. Fig. 9 shows the composition of one of the boulders
from Fig. 8. It is clear from this EDX data that the boulder
composition is, in fact, copper. It is also evident that the
boulders are embedded in the copper layer when it is sputter
deposited. The gold peak in Fig. 9 is present since the entire
sample was sputter coated with a thin layer of gold prior to
D. Voltage/Current Induced Failure Sites
It was noted that the tantalum oxide capacitors which failed
always failed as a short-circuit, exhibiting a few ohms of
resistance. Rarely ever did a failed capacitor exhibit an open.
However, the investigation into the cause of the capacitor
failure, specifically, what caused the shorts between the two
MORCAN et al.: CHARACTERIZATION OF THIN FILM TANTALUM OXIDE CAPACITORS505
Fig. 8. Copper boulders embedded in the bottom copper electrode.
Fig. 9. EDX plot showing copper content of boulder defect.
electrodes, is of great importance. Such information can indi-
cate processing procedures and material properties that should
be changed in their fabrication, as well as interfacial properties
between the materials being used, and defects that may be
characteristic of a particular dielectric material.
The reliability and dielectric stress work performed on the
capacitors indicated that some electrically good capacitors can
be destroyed or shorted by applying a voltage bias across
the parallel metal plates or by forcing a current to pass
through the weak sites of the dielectric. The experiment,
as described earlier, was performed on various capacitors.
These experiments determined the exact location of failures
at different stages in the failure process.
1) Causes of Capacitor Short Failures: From the capac-
itors that were intentionally shorted, only those that had
one or two defect sites per capacitor were chosen for SEM
analysis. Each site had one abnormal characteristic which
was photographed at the same magnification and compared to
the type of defect that was discussed previously (see Fig. 6).
Three stages of failure were found in the analysis, depending
on the magnitude and duration of the current flow through
506 IEEE TRANSACTIONS ON ADVANCED PACKAGING, VOL. 22, NO. 3, AUGUST 1999
Fig. 10.First stage of current induced capacitor failure.
Fig. 11. Second stage of current induced capacitor failure.
The first stage of failure is shown in Fig. 10 and is indicative
of a defect which was slightly affected by leakage current.
Pitting can be seen around the boulder. However, due to the
short duration of the current flow, the boulder remained intact.
The edges between the boulder and the dielectric are rougher
than that of an unstressed defect indicating that the current
path is along the edges.
When the duration of the current flow is longer than for
the defect in Fig. 10, a second stage of failure is created as
shown in Fig. 11. This stage is the initial destruction of the
defect site. Due to the increased current flow and local heating
from conduction, the defect begins to melt and to vaporize. The
current has the greatest effect on the least resistive current path
between the metal plates of the capacitor, sometimes causing
a defect to explode violently.
When the current flow is allowed to completely destroy
the defect, the result is a defect site as shown in Fig. 12.
Most of the sites investigated had this characteristic which
MORCAN et al.: CHARACTERIZATION OF THIN FILM TANTALUM OXIDE CAPACITORS507
Fig. 12. Third stage of current induced capacitor failure.
Fig. 13. Boulder defects that are not equally affected by current flow.
indicates a current induced total burnout of the defect. The
sites that had this characteristic had no other defect within
the site area indicating that there was a single defect causing
the excessive current flow. Furthermore, although the defect is
completely burned out, the capacitor remains shorted, leading
to the conclusion that the two metal electrodes are fused at the
defect site due to localized heating.
Another interesting observation was that the defect boulders
were not all equally affected by the applied bias voltage. As
seen in Fig. 13, one out of three boulders was burned out.
The adjacent two boulders remained unaffected. The burned
out defect was obviously the preferred current path, and the
other two boulders were unaffected for two possible reasons.
They could have a dielectric layer separating them from the top
metal electrode of the capacitor and, therefore, did not conduct
any current. Another possibility is that all defects pass current
initially, but the defect with the least resistance begins to hog
the current. After it burns out, the next defect with the least
508 IEEE TRANSACTIONS ON ADVANCED PACKAGING, VOL. 22, NO. 3, AUGUST 1999
Temperature dependent leakage current of tantalum oxide capaci-
resistance to current flow either supports the current or ends
up burning out. As long as the top and bottom electrodes are
not fused during a burn out, this process could continue for all
defects in an area, such as that seen in Fig. 5. However, from
extensive observations, it was determined that the first defect
burnout usually results in fusion of the two electrodes, creating
a metallic path for current flow and permanently shorting the
It should be mentioned that most of the capacitors were
defect free. Metallic particles embedded in the capacitor bot-
tom electrode is only one possible cause of failure of these
capacitors. To mitigate metallic nodule formation, steps must
be taken to prevent arcing during the electrode sputtering.
However, consideration must also be given to the quality
of the polyimide substrate as mentioned in , and to the
quality of the tantalum oxide dielectric. Any roughness of the
surface of the polyimide substrate will propagate to all surfaces
of the structure, and furthermore, defects occurring in the
tantalum oxide dielectric, such as pinholes or metallic tantalum
particles, can also compromise reliability and performance.
E. Dielectric Leakage Current and Conduction Mechanism
To determine the conduction mechanism of the tantalum
oxide, its leakage
– characteristics were measured as a
function of temperature. Fig. 14 shows the semilogarithmic
characteristics as a function of temperature for a
typical tantalum oxide capacitor. As can be seen, the leakage
current increases rapidly below 1 V. It then increases more
slowly as the applied voltage is increased further.
It has been shown that tantalum oxide dielectric exhibits ion
conduction . The leakage –
of temperature for ionic conduction can be expressed as
characteristic as a function
energy and the Boltzmann constant
For this conduction mechanism, leakage current is carried by
is the leakage current density,
is the applied voltage,
is the temperature
is the ionic activation
Fig. 15. Ionic current temperature dependence.
Fig. 16.Ionic activation energy as a function of applied electric field.
tantalum ions that form in the interior of the oxide. They are
interstitial with respect to a hypothetical tantalum ion lattice
embedded in the tantalum oxide glass .
voltage (10, 20, 30, and 40 V) for a tantalum oxide capacitor
are shown in Fig. 15. Linear regression was performed on the
data and the results were plotted as simulated values, along
with the actual data points. The data show a good linear fit
of better than 0.99. From the slope of the simulated traces,
the activation energy for this conduction mechanism can be
The ionic activation energies were calculated at 10, 20, 30,
and 40 V and then plotted as shown in Fig. 16. As can be
seen, the activation energy is dependent on the applied electric
field across the dielectric. As the electric field is increased,
the activation energy decreases, ranging from 0.47 eV at an
electric field of 0.13 MV/cm to 0.38 eV at 0.73 MV/cm.
as a function of applied
Tantalum oxide capacitors were fabricated on flexible poly-
imide substrates and characterized as a function of frequency
and applied electric field. The dielectric constant of the tanta-
MORCAN et al.: CHARACTERIZATION OF THIN FILM TANTALUM OXIDE CAPACITORS509 Download full-text
lum oxide dielectric was found to be independent of frequency
in the range of 100 MHz to 1.1 GHz. Thermal and current
annealing were found to reduce the leakage current of the
capacitors. Intrinsic defects of the capacitors were examined
and the failure mechanisms were identified. Copper particu-
lates created during sputtering and embedded in the bottom
copper electrode were the primary cause of electrical shorts.
From leakage current–voltage measurements as a function
of temperature, the conduction mechanism in the tantalum
oxide dielectric was determined to be predominantly ionic.
Activation energies were linearly dependent on the applied
electric field, ranging from 0.47 eV at an electric field of 0.13
MV/cm to 0.38 eV at an electric field of 0.73 MV/cm.
The authors would like to acknowledge the technical as-
sistance of Dr. J. Shultz and Dr. P. Parkerson, University of
Arkansas, and C. Wan, Sheldhal, Inc.
 H. Yoshino, T. Ihara, S. Yamanak, and T. Igarashi, “Tantalum oxide thin-
film capacitor suitable for being incorporated into an integrated circuit
package,” in Proc. 6th IEEE/CHMT Int. Electron. Manufact. Technol.
Symp, Japan, 1989, pp. 156–159.
 K. Fairchild, G. Morcan, T. Lenihan, W. Brown, L. Schaper, S. Ang, W.
Sommers, J. Parkerson, and M. Glover, “Thin-film embedded resistors
and electrical characterization of thin-film embedded capacitors and
inductors,” in Proc. 47th Electron. Comp. Technol. Conf., 1997, pp.
 K. Chen, M. Nielsen, S. Soss, E. Rymaszewski, T. M. Lu, and C. Wan,
“Study of tantalum oxide film capacitors on metallized polymer sheets
for advantaged packaging applications,” IEEE Trans. Comp., Packag.,
Manufact. Technol., vol. 20, pp. 117–122, May 1997.
 W. T. Liu, S. Cochrane, X. M. Wu, P. K. Singh, X. Zhang, D. B.
Knorr, J. F. McDonald, E. J. Rymaszewski, J. M. Borrego, and T. M.
Lu, “Frequency domain (1 kHz–40 GHz) characterization of thin films
for multichip module packaging technology,” Electron. Lett., vol. 30,
no. 2, pp. 117–118, 1994.
 C. Morcan, S. S. Ang, T. G. Lenihan, L. W. Schaper, J. P. Parkerson, and
W. D. Brown, “Electrical characterization of thin film integral passive
devices on polyimide-based packaging structures,” Int. J. Microcirc.
Electron. Packag., vol. 21, no. 4, pp. 306–315, 1998.
 C. P. Bean, J. C. Fisher, and D. A. Vermilyea, “Ionic conductivity of
tantalum oxide at very high fields,” Phys. Rev., vol. 101, no. 2, pp.
M.S.E.E. degrees from the University of Arkansas,
Fayetteville, in 1996 and 1997, respectively.
He conducted research at the High-Density
Electronics Center (HiDEC) and was involved in
electrical characterization of embedded flexible
passive devices from 1995 to 1998. As a graduate
Research Assistant, he developed various testing
procedures for the characterization of integral
resistors, capacitors, and inductors. He was also
involved in the electrical modeling and fabrication
received the B.S.E.E.and
of integral passive devices and electrical characterization of various other
micro structures. Currently, he is a Mixed Signal Test Engineer for the Data
Converter Group, Texas Instruments, Inc., Dallas.
Simon S. Ang (S’79–M’79–SM’94), for a photograph and biography, see
this issue, p. 320.
Timothy G. Lenihan (M’77–SM’89) received B.Sc. degrees in physics and
mathematics from Wheeling College, Wheeling, WV, in 1974, the M.S. degree
in solid state physics from DePaul University, Chicago, IL, in 1978, and
the Ph.D. degree in electrical engineering from the University of Arkansas,
Fayetteville, in 1996.
From 1978 to 1993, he was with IBM, East Fishkill, NY. He held technical
and managerial positions in packaging and semiconductor development areas.
He is with Sheldahl, Inc., Longmont, CO, as a Technical Fellow. He is also
an Adjunct Faculty member in the Department of Electrical Engineering,
University of Arkansas. The focus of his present research is merging Sheldhal
high density interconnect and embeded thin film passive device technologies
into an integrated packaging technology.
Dr. Lenihan is a member of IMAPS and the New York Academy of Science.
Leonard W. Schaper (S’65–M’67–SM’96–F’99), for a photograph and
biography, see this issue, p. 320.
William D. Brown (S’67–M’70–SM’82), for a photograph and biography,
see this issue, p. 320.