Article

# Simplified RF noise de-embedding method for on-wafer CMOS FET

Inst. of Microelectron., Singapore
Electronics Letters (impact factor: 0.96). 02/2007; DOI:10.1049/el:20071442 pp.1000 - 1001
Source: IEEE Xplore

ABSTRACT A simplified RF noise de-embedding method for an on-wafer CMOS device using only one dummy structure for simplicity and area reduction is presented. The method describes the use of a 'thru' test structure to subtract completely the parasitic effects of pads and in/out interconnections from the device under test. A comparison of the de-embedding results among the simplified method and existing de-embedding methods is given, which proves that the new method is effective, accurate and time efficient.

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##### Article:RF Noise of 65-nm MOSFETs in the Weak-to-Moderate-Inversion Region
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ABSTRACT: In this letter, the RF noise performance of 65-nm MOSFETs with 60-, 90-, 130-, and 240-nm drawn gate lengths has been extensively investigated in the weak-to-moderate-inversion region for low-power and low-voltage (LPLV) applications. Noise measurements show that although the noise performance is directly related to gate length ( Lg ), it does not monotonically scale with the inverse of gate length. When biased in the weak-inversion region, a transistor with slightly relaxed gate length, instead of minimum gate length, will benefit from a smaller gate resistance and a smaller equivalent noise resistance Rn . The transistor transconductance ( gm ), output conductance ( gd ), unity current gain frequency ( fT ) , maximum frequency of oscillation ( f <sub>max</sub>), and noise parameters are extracted as a function of the drain current density and compared among devices with different gate lengths.
IEEE Electron Device Letters 03/2009; · 2.85 Impact Factor

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### Keywords

de-embedding methods

de-embedding results

new method

on-wafer CMOS device

one dummy structure

parasitic effects

simplified method

simplified RF noise de-embedding method

time efficient