Article
Simplified RF noise de-embedding method for on-wafer CMOS FET
Inst. of Microelectron., Singapore
Electronics Letters (impact factor:
0.96).
02/2007;
DOI:10.1049/el:20071442
pp.1000 - 1001
Source: IEEE Xplore
-
Citations (0)
- Cited In (1)
-
Article: RF Noise of 65-nm MOSFETs in the Weak-to-Moderate-Inversion Region
[show abstract] [hide abstract]
ABSTRACT: In this letter, the RF noise performance of 65-nm MOSFETs with 60-, 90-, 130-, and 240-nm drawn gate lengths has been extensively investigated in the weak-to-moderate-inversion region for low-power and low-voltage (LPLV) applications. Noise measurements show that although the noise performance is directly related to gate length ( Lg ), it does not monotonically scale with the inverse of gate length. When biased in the weak-inversion region, a transistor with slightly relaxed gate length, instead of minimum gate length, will benefit from a smaller gate resistance and a smaller equivalent noise resistance Rn . The transistor transconductance ( gm ), output conductance ( gd ), unity current gain frequency ( fT ) , maximum frequency of oscillation ( f <sub>max</sub>), and noise parameters are extracted as a function of the drain current density and compared among devices with different gate lengths.IEEE Electron Device Letters 03/2009; · 2.85 Impact Factor
Data provided are for informational purposes only. Although carefully collected, accuracy cannot be guaranteed.
The impact factor represents a rough estimation of the journal's impact factor and does not reflect the actual
current impact factor.
Publisher conditions are provided by RoMEO. Differing provisions from the publisher's actual policy or licence
agreement may be applicable.
Keywords
de-embedding methods
de-embedding results
new method
on-wafer CMOS device
one dummy structure
parasitic effects
simplified method
simplified RF noise de-embedding method
time efficient