Logistic model for leakage current in electrical stressed ultra-thin gate oxides
University of Buenos Aires, Buenos Aires, Buenos Aires F.D., ArgentinaElectronics Letters (Impact Factor: 0.93). 06/2003; 39(9):749 - 750. DOI: 10.1049/el:20030485
Source: IEEE Xplore
It is shown that the leakage current flowing through an ultra-thin gate oxide in a metal-oxide-semiconductor structure subjected to a constant voltage stress can be described by a Verhulst-type logistic model. An exponential growth at the outset is followed by a saturation in the conduction characteristic, which indicates that, after a rapid expansion, the damaged area reaches an upper bound. This sigmoidal behaviour is interpreted as a self-constrained growth of the leakage site population.
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ABSTRACT: When the gate insulator of a metal–oxide–semiconductor structure is subjected to electrical stress, traps or defects are progressively generated inside the oxide that eventually lead to the formation of a low-resistance conducting path between the electrodes. The occurrence of such event can be detected either as a gradual or as a sudden change in the system’s conductance and is associated with the appearance of a localized conduction mechanism in parallel with the area-distributed tunneling current. According to the magnitude and shape of the resulting current–voltage characteristic, the failure mode is usually referred to as soft or hard breakdown. However, because of the random nature of the phenomenon, interpretation and modelling of the electron transport mechanism involved has turned out to be very challenging from the physical point of view. Several models have been proposed to this aim, which can be classified basically according to the underlying mechanism: junction-like, hopping, percolation and tunneling conduction. Within this latter mechanism we can mention direct, Fowler–Nordheim, trap-assisted, resonant, inelastic tunneling and point contact conduction. In this paper, after an overview of a variety of physical and engineering aspects of post-breakdown, we critically examined the foundations and limitations of the proposed conduction models in the light of others and ours experimental results, putting special emphasis on those approaches providing final closed expressions.Microelectronics Reliability 01/2004; 44(1-44):1-23. DOI:10.1016/j.microrel.2003.08.005 · 1.43 Impact Factor
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ABSTRACT: We report the effect of relatively high-voltage stressing (under substrate injection) on the stress-induced leakage current (SILC) and breakdown of W-La2O3 stacked structures. It is shown that the gate area of the metal-insulator-semiconductor (MIS) devices under evaluation influences their final degradation characteristics after stress. Once the samples reach breakdown, their post-breakdown current-voltage (I-V) characteristics suggest that leakage spots are highly localized and are caused by the accumulation of defects.Japanese Journal of Applied Physics 09/2008; 47(9):7076-7080. DOI:10.1143/JJAP.47.7076 · 1.13 Impact Factor
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