Voltage setup problem for embedded systems with multiple voltages

Univ. of Maryland, College Park, MD, USA
IEEE Transactions on Very Large Scale Integration (VLSI) Systems (Impact Factor: 1.14). 08/2005; DOI: 10.1109/TVLSI.2005.850122
Source: IEEE Xplore

ABSTRACT We formulate the following voltage setup problem: how many levels and at which values should voltages be implemented on the system to achieve the maximum energy saving by dynamic voltage scaling (DVS)? This problem challenges whether DVS technique's full potential in energy saving can be reached on multiple voltage systems. In this paper, 1) we derive analytical solutions for dual-voltage system; 2) we develop efficient numerical methods for the general case where analytical solutions do not exist; 3) we demonstrate how to apply our proposed algorithms in system design; and 4) our experimental results suggest that, interestingly, multiple voltage systems with proper voltage setup can be very close to DVS technique's full potential in energy saving.

  • [Show abstract] [Hide abstract]
    ABSTRACT: The paper presents a method of optimum control of throughput (OCT) of microprocessor (or other processing machine) with taking into account required efficiency, which is taken from operating system, and internal temperature. The optimum performance of integrated system is achieved by means of required efficiency control for safety i.e. low enough temperatures and temperature-based control utilizing thermal feedback for dangerous (high) internal temperatures. The latter control technique, which is obtained using dedicated Temperature-Controlled Oscillator (TCO), assures thermal reliability, i.e. ensures that semiconductor structure temperature do not exceed the critical value of this quantity. The presented method guarantees energy savings and against overheating. The optimum control of throughput of microprocessor is modeled and analyzed using Simulink.
    Microelectronics Reliability 04/2013; 53(4):582–591. DOI:10.1016/j.microrel.2012.10.014 · 1.21 Impact Factor
  • Source
    [Show abstract] [Hide abstract]
    ABSTRACT: Energy saving is becoming one of the major design issues in processor architectures with multiple functional units (FUs). Nested loops are usually the most critical part in multimedia and high-performance DSP systems. There is a tradeoff between power saving and performance, such as timing constraint and code size requirement, of nested loops. This paper studies how to minimize the total energy while satisfying performance requirement for applications with multidimensional nested loops. An algorithm, energy minimization with loop fusion and FU schedule (EMLFS), is proposed. We first use retiming and partition to fuse nested loops. Then we use novel FU scheduling algorithms to maximize energy saving without sacrificing performance. The experimental results show that the average improvement on energy saving is significant by using our EMLFS algorithm.
    Journal of Parallel and Distributed Computing 04/2008; 68(4-68):443-455. DOI:10.1016/j.jpdc.2007.06.014 · 1.01 Impact Factor
  • [Show abstract] [Hide abstract]
    ABSTRACT: A digital-control single-inductor triple-output (SITO) dc–dc converter is presented in this paper. The dc–dc converter features a proposed pre-sub-period inductor-current control that can deliver more load-current by individual subconverter and reduce crossregulation among different subconverters simultaneously. The proposed digital-control SITO dc–dc converter is implemented by a commercial 0.35-μm CMOS process. The chip area is 1600 μm × 1700 μm. The dc–dc converter is capable to be configured as two buck subconverters and one boost subconverter. The measured maximum power efficiency is 83.5%.
    IEEE Transactions on Power Electronics 04/2012; 27(4):2028-2042. DOI:10.1109/TPEL.2011.2170221 · 5.73 Impact Factor


Available from