Article
Digital quadrature demodulator with four phases mixing for digital radio receivers
Dept. of Teoria de Senal y Comunicaciones, Univ. de Alcala, Madrid, Spain
IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing
01/2004;
DOI:10.1109/TCSII.2003.820244
pp.1011 - 1015
Source: IEEE Xplore
- Citations (7)
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Cited In (0)
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Conference Proceeding: Direct-conversion radio transceivers for digital communications
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ABSTRACT: The current interest in portable wireless communications devices is prompting research into new IC technologies, circuit configurations, and transceiver architectures. Miniature transceivers dissipating low power are sought to sought to communicate digital data. While transistor technology scaling and improved circuit techniques will lead to the inevitable evolutionary advances towards this goal, architectural innovations in the transceiver will lead to revolutionary improvements. It is in this context that there is a resurgence of interest in direct-conversionSolid-State Circuits Conference, 1995. Digest of Technical Papers. 42nd ISSCC, 1995 IEEE International; 03/1995 -
Article: Design considerations for direct-conversion receivers
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ABSTRACT: This paper describes the issues and tradeoffs in the design and monolithic implementation of direct-conversion receivers and proposes circuit techniques that can alleviate the drawbacks of this architecture. Following a brief study of heterodyne and image-reject topologies, the direct-conversion architecture is introduced and effects such as dc offset, I/Q mismatch, even-order distortion, flicker noise, and oscillator leakage are analyzed. Related design techniques for amplification and mixing, quadrature phase calibration, and baseband processing are also describedIEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing 07/1997; -
Article: Low-IF topologies for high-performance analog front ends of fully integrated receivers
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ABSTRACT: When it comes to integratability, the zero-intermediate frequency (IF) receiver is an alternative for the heterodyne or IF receiver. In recent years, the zero-IF receiver has been introduced in several applications, but its performance cannot be compared to that of the IF receiver yet. This lower performance is closely related to its baseband operation, resulting in filter saturation and distortion, both caused by DC-offsets and self-mixing at the inputs of the mixers. The low-IF receiver has a topology which is closely related to the zero-IF receiver, but it does not operate in the baseband, only near the baseband. The consequences are that, as for the zero-IF receiver, the implementation of a low-IF receiver can be done with a high degree of integration, however, its performance can be better. In this paper, the fundamental principles of the low-IF receiver topology are introduced. Different low-IF receiver topologies are synthesized and fully analyzed in this paper. This is done by applying the complex signal technique-a technique used in digital applications to the study of analog receiver front endsIEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing 04/1998;
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