IEEE MICROWAVE AND GUIDED WAVE LETTERS, VOL. 7, NO. 11, NOVEMBER 1997 377
Lightly Doped Emitter HBT for Low-Power Circuits
C. E. Chang, P. F. Chen, P. M. Asbeck, Senior Member, IEEE, L. T. Tran,
D. C. Streit, Senior Member, IEEE, and A. K. Oki, Member, IEEE
Abstract—We report an approach to reduce the base–emitter
capacitance in AlGaAs/GaAs heterojunction bipolar transistors
(HBT’s) by adding a lightly doped emitter (LDE) region together
with appropriate planar (?) doping region to a conventional
base–emitter junction. This improves both the ?? and ? for low
collector current density (??) operation while preserving the high
peak ?? at high ??. When applied to a current mode logic 128/129
programmable prescaler, the LDE HBT results in a reduction in
power dissipation and improved bandwidth without any circuit
Index Terms— Frequency conversion, heterojunction bipolar
high-speed digital circuits. Typically, HBT’s are biased at high
collector current densities for high speed, requiring relatively
high power dissipation. However, the maximum device speed
might not always be needed throughout the entire design. In
such cases, the development of high-speed low-power HBT’s
can increase the attractiveness of HBT technology. Applica-
tions can include portable wireless communications, moderate
power digital circuits, and A/D converters. In this letter, the
performance of a low-power high-speed HBT is discussed.
The low-power attributes of these HBT’s are demonstrated in
a digital circuit fabricated with TRW’s baseline microwave
lGaAs/GaAs-BASED heterojunction bipolar transistors
(HBT’s) are being applied in a variety of microwave and
II. DEVICE RESULTS
) of an HBT is expressed as follows :The transit time (
junction and other symbols are standard. At high current
is the depletion capacitance of the base–emitter
Manuscript received July 15, 1997. This work was supported in part by
ARPA under the MIMIC Phase 3 program (Contract DAAL-01-92-K-0262)
and was monitored by the Army Research Laboratory, Fort Monmouth, NJ.
C. E. Chang was with the Department of Electrical Engineering and
Computer Science, University of California, San Diego, La Jolla, CA 92093-
0407 USA. He is now with Rockwell International Science Center, Thousand
Oaks, CA 91360 USA.
P. F. Chen and P. M. Asbeck are with the Department of Electrical
Engineering and Computer Science, University of California, San Diego, La
Jolla, CA 92093-0407 USA.
L. T. Tran, D. C. Streit, and A. K. Oki are with TRW Electronics and
Technology Division Space and Electronics Group, Redondo Beach, CA
Publisher Item Identifier S 1051-8207(97)08186-5.
Fig. 1. LDE HBT epilayer structure.
) and the collector space charge layer (
. At low current density (
at low , improving HBTs’ microwave performance at lower
In this work, TRW baseline HBT’s  were modified for
low-power high-speed operation. The base–emitter capacitance
was reduced by increasing the depletion region width with
a fully depleted lightly doped emitter (LDE) layer placed
between the base and the emitter of the baseline HBT, as
shown in Fig. 1. The standard TRW HBT process was used
to fabricate the devices. With an LDE thickness of 137 nm
doped n-type to 10
be reduced by as much as 2.7 , leading to increased
 as shown in Fig. 2(a). The 137-nm LDE design can
by as much as 2.3
performance of the 100-nm design is similar.
The dc current gain ( ) of the initial LDE devices is lower
than that of the baseline HBT’s. Simulations show that the
LDE introduces a potential barrier in the conduction band
whose height above the base
retards electron flow and the corresponding valence band
shift favors hole injection into the emitter, thus
and increases the base–emitter turn-on voltage (
of the 137-nm-LDE only device, as shown in Fig. 2(b), is
much lower than the baseline HBT.
The negative side effects in the thick LDE AlGaAs/GaAs
HBT’s can be countered by band profile shaping with -doping
. Using -doping of Si donors around 6
the conduction band barrier maximum,
by as much as 60 meV . The location of the maximum
A/cm ), near the peak bias, the base
) transit times
would increase. Reducing
at typical forward biases can
at low. The microwave
will be referred to as.
can be lowered
1051–8207/97$10.00 1997 IEEE
378 IEEE MICROWAVE AND GUIDED WAVE LETTERS, VOL. 7, NO. 11, NOVEMBER 1997
? versus ?? for a 2 ? 5 ?m?.
(a) Measured ??versus ??for a quad 2 ? 10 ?m?and (b) measured
occurs near the AlGaAs to graded-AlGaAs interface
300 ˚ A from the base (Fig. 1). The reduced
the LDE induced increase in
barrier for increased
. The small remaining
reduce recombination in the base–emitter space charge region,
leading to higher
than theof the baseline device. In abrupt
HBT’s without the LDE, it has been shown that -doping in
the emitter can reduce
versus curves of the different designs. All
of the -doped structures have significantly increased
the baseline for
A/cm in addition to higher
and increases the hole
and increase . Fig. 2(b)
III. CIRCUIT RESULTS
For differential pairs in logic circuits, the performance
limiting average input capacitance can be expressed as
is the total input charge,
the forward transit time (related to the diffusion capacitance),
is the differential pair load resistance. At low bias,
represents 80% ofwith the baseline (microwave)
HBT. In the 137-nm LDE HBT,
is the logic swing, is
is reduced by 1.9.
Fig. 3. Photograph for the fabricated prescaler.
Differential pair bias versus maximum input frequency of the
lower power dissipation.
A two-level CML divide-by-128/129 prescaler was chosen
as the LDE HBT demonstration vehicle. The prescaler topol-
ogy consists of a programmable divide by 4/5 cascaded with
a 5-bit counter. The load resistance is 330
In this work, the prescaler was implemented with the
TRW monolithic microwave integrated circuit (MMIC) HBT
foundry design rules. The results demonstrate the ability of
a microwave process to yield digital circuits with high levels
of integration. In the MMIC process, the second layer metal
consists of plated gold 3
m thick for low-loss passive
elements. The minimum line and space widths are larger than
in a digital process, resulting in increased chip area (by about
3 ). In the MMIC process, the smallest HBT has an emitter
area of 2
5 m which is larger than for transistors found
in a typical digital process, this typically increases
principle, the standard MMIC process can be modified to lower
and area. However, our objective is to demonstrate
the power saving capabilities of the LDE HBT which do not
require further area scaling. Fig. 3 contains a photograph of the
fabricated prescaler. This chip contains 223 HBT’s, fabricated
next to several TRW 20-GHz MMIC’s, paving the way for
combined microwave and digital circuits.
Prescaler circuits were characterized with on-wafer probing.
The maximum input frequency for proper operation with a
given bias was determined and is plotted in Fig. 4 for various
designs. The results (averaged over several circuits) show
that the LDE designs result in lower
, similar performance can be expected with
and the bias is
than the baseline
IEEE MICROWAVE AND GUIDED WAVE LETTERS, VOL. 7, NO. 11, NOVEMBER 1997379
design. Without any modifications to the baseline circuit, the
LDE HBT, in a drop-in application, can reduce the power
dissipation by as much as 50% when compared at 1.5-GHz
operation (from 250 to 125 mW). Simulations show that
further reduction in
can be achieved by optimizing the
circuit for the LDE HBT.
reductions are achieved with novel mod-In this work,
ifications of the baseline TRW HBT by introducing the LDE
-doping. This improves both
allows for reduced
without sacrificing performance. The
microwave and dc characteristics of two LDE designs are
evaluated. The low-power characteristics of the LDE HBT
were evaluated in a programmable 128/129 prescaler designed
for the baseline TRW HBT and laid out for a MMIC process.
and at low, and
The LDE designs allowed for a dramatic reduction in
without any circuit modifications.
The authors would like to thank T. Block at TRW for MBE
growths and C. Sieg-Fostvelt for layouts.
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