An approach to determine small-signal model parameters for InP-based heterojunction bipolar transistors

Abstract

A new method for the extraction of the small-signal model parameters of InP-based heterojunction bipolar transistors (HBT) is proposed. The approach is based on the combination of the analytical and optimization technology. The initial values of the parasitic pad capacitances are extracted by using a set of closed-form expressions derived from cutoff mode S-parameters without any test structure, and the intrinsic elements determined by using the analytical method are described as functions of the parasitic elements. An advanced design system is then used to optimize only the parasitic parameters with very small dispersion of initial values. Good agreement is obtained between simulated and measured results for an InP HBT with 5×5 μm² emitter area over a wide range of bias points up to 40 GHz.

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138 IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, VOL. 19, NO. 1, FEBRUARY 2006
An Approach to Determine Small-Signal Model
Parameters for InP-Based Heterojunction
Bipolar Transistors
Jianjun Gao, Member, IEEE, Xiuping Li, Member, IEEE, Hong Wang, Member, IEEE, and
Georg Boeck, Senior Member, IEEE
Abstract—A new method for the extraction of the small-signal
model parameters of InP-based heterojunction bipolar transistors
(HBT) is proposed. The approach is based on the combination
of the analytical and optimization technology. The initial values
of the parasitic pad capacitances are extracted by using a set of
closed-form expressions derived from cutoff mode S-parameters
without any test structure, and the intrinsic elements determined
by using the analytical method are described as functions of the
parasitic elements. An advanced design system is then used to
optimize only the parasitic parameters with very small dispersion
of initial values. Good agreement is obtained between simulated
and measured results for an InP HBT with 5
area over a wide range of bias points up to 40 GHz.
5m?emitter
Index Terms—Heterojunction bipolar transistor (HBT), mod-
eling, parameter extraction.
I. INTRODUCTION
A
performance of heterojunction bipolar transistor (HBTs) based
on a III-V material system [1], [2]. Optimization methods have
been usually used for the determination of these parameters.
However, the accuracy of the numerical optimization methods
that minimizes the difference between measured and modeled S
parameters versus frequency can vary, depending upon the opti-
mization method and the starting values, and may result in non-
physical and nonunique results for the extracted elements. An
analytical approach in an HBT equivalent circuit parameter ex-
traction was addressed in [3]–[14]. The parasitic capacitances
can be extracted by using open or through test structures [3],
[13]. However, these methods require special test structures for
each device size on the wafer, and the nonuniformity across
the wafer has to be ignored. Alternatively, the cutoff cold-HBT
method (both junctions are zero or reverse biased) has been ex-
tensively used for the extraction of the parasitic capacitances
N ACCURATE procedure for extraction of the parasitic
parameters is extremely important for optimizing device
Manuscript received August 2, 2004; revised August 25, 2005.
J. Gao is with the Institute of RF- and OE-IC’s, Radio Engineering De-
partment, Southeast University, Nanjing 210096, China (e-mail: gaojianjun@
seu.edu.cn).
X. Li is with the Department of Telecommunication Engineering, Beijing
University of Posts and Telecommunications, Beijing 100876, China.
H. Wang is with the Department of Electrical and Electronics Engineering,
Nanyang Technological University, 639798 Singapore.
G. Boeck is with the Microwave Engineering Department, Technische Uni-
versität Berlin, Berlin 10587, Germany.
Digital Object Identifier 10.1109/TSM.2005.863222
[9]–[13]. Unfortunately, the accuracy of this method has been
found to be not satisfactory. As a consequence of these difficul-
ties, the values of the pad capacitances are often guessed or set
to zero because it is difficult to distinguish between base pad
capacitance and the corresponding base-emitter junction capac-
itance [11]–[13].
In order to overcome these difficulties, an improved method
is proposed inthis paper. This method is combination of numer-
ical optimization and direct extraction methods. There are two
aspects which are new here.
1) The PAD capacitances are determined by using a new
cutoff cold-HBT method, so the PAD capacitances can be
separated from other parasitic elements. This method is
based on two-port analysis of the equivalent circuit model
of the cutoff HBT. The series inductances and resistances
are determined by using an open-collector method.
2) The above model parameters are regarded as the initial
value for optimization by using advanced design system
(ADS) software without programming. The intrinsic ele-
ments are described as functions of the parasitic elements.
So, the method combines the advantages of the analytical
and optimization extraction methods; thus, more accurate
extracted results can be obtained.
This paper is organized as follows. Section II describes the
basic formalism of the new method used in the extraction pro-
cedure.InSectionIII,extractionresultsaregivenanddiscussed.
The conclusions are discussed in Section IV.
II. THEORETICAL ANALYSIS
A. Device Structure
The InP HBTs used in this paper were grown by gas-source
molecular beam epitaxy (GSMBE) on semi-insulating (100)
InP substrates supplied by a commercial vendor. Be and Si are
used for p- and n-type dopants, respectively. The detailed layer
structure of the InP/InGaAsInP DHBT is shown in Table I. An
InGaAs/InP composite collector structure with a dipole doping
at the InGaAs/InP interface is employed to avoid a current
blocking effect.The devices were fabricated with a triple mesa
process with different emitter sizes. Nonalloyed TiPtAu were
used for emitter, base, and collector ohmic contacts. Gold-elec-
troplated air bridges were then used to connect the emitter,
base, and collector contacts to the external wire-bonding pads.
The peak
and for the HBTs with 5
and 50 GHz, respectively. In order to alleviate the influence of
surface effect which may be process dependent, devices with
5m are 75
0894-6507/$20.00 © 2006 IEEE

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GAO et al.: APPROACH TO DETERMINE SMALL-SIGNAL MODEL PARAMETERS FOR INP-BASED HBT 139
TABLE I
EPITAXIAL STRUCTURE OF InP/InGaAs/InP DHBT
Fig. 1. Small-signal equivalent circuit for InP HBT.
larger emitter area 40
ature testing. To minimize series resistance, diced devices were
assembled in the standard TO package bonded using golden
wires.
40 mwere chosen for low-temper-
B. Small-Signal Model
The conventional hybrid- -type small-signal equivalent cir-
cuit model is shown in Fig. 1. Since the T-shaped equivalent
circuit is more closely related to the original derivation of the
common base
parameters of bipolar transistors, and involves
less simplifying assumptions than the
is usually employed in the literature for the purpose of small-
signalparametersextractionofHBTs.Thecircuitisdividedinto
two parts, i.e., the outer part contains the extrinsic elements,
considered bias independent, and the inner part contains the in-
trinsic elements, consideded bias dependent.
The
matrix of a complete device model of the small-signal
equivalent circuit can be written as
equivalent circuit, it
(1)
represents PAD capacitance part
(2)
The open circuit
equivalent circuit can be expressed as [2]
parametersof the small-signal
(3)
(4)
(5)
(6)
with
where
collector, and emitter device connection, respectively,
represent the base and collector pad capacitances,
are the extrinsic and intrinsic base resistances,
arethecollectorandemitterresistances,and
extrinsic and intrinsic base-collector capacitances, respectively.
is base-to-emitter capacitance.
Assuming a single-pole approximation, the transport factor
can be written
,, andrepresent the inductances of the base,
and
and
and
arethe and
(7)
where
is the 3-dB rolloff frequency, and
It is noted that the extrinsic base-collector resistance
the intrinsic base-collector resistance
model, due to the fact that values of
and do not affect the frequency response much, as long as we
are only concerned with forward operation.
The HBT small-signal equivalent circuit model under cutoff
condition is shown in Fig. 2. Cutoff bias condition for HBTs
is defined as the condition when both junctions are zero or re-
verse biased. Under such conditions, dc current is zero, hence
would be extremely small and the device behaves like a passive
component
.
denotestheintrinsic currentgain atlowfrequency,
is the transit time delay.
and
are neglected in this
and are very large

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140IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, VOL. 19, NO. 1, FEBRUARY 2006
Fig. 2. Small-signal equivalent circuit for InP HBT under cutoff condition.
Fig. 3. HBT cutoff model at low frequency.
At low frequency, the HBT equivalent circuit of Fig. 2 ex-
hibits a pure capacitive behavior and is simplified as shown in
Fig. 3.
C. Determination of PAD Capacitances
The capacitances
determined by linear regression of
under cutoff condition [2]
, , andcan be
at low frequency
(8)
(9)
(10)
Because the range of the applicable reverse base-emitter
voltage is limited, a separation of
internal p–n junction capacitance by using fitting techniques is
difficult. In this paper, a new method is employed to determine
the parasitic base capacitance
equivalent circuit (Fig. 2). First, the series inductances and
resistances, i.e.,
,,,
by using an open-collector method. After de-embedding the
effects of
,, and, the open circuit
from its corresponding
based on a complete cutoff
,, andare determined
parameters of
the intrinsic part extended by
expressed as follows:
,,,, and can be
(11)
(12)
(13)
where
(14)
(15)
(16)
(17)
Becausethe
parameters at low frequency, only three unknown parameters
are left to be determined. The following equations are obtained
after simple calculation and neglect of second-order terms
andcanbeobtainedfrom
(18)
(19)
(20)
Substituting (18) and (19) into (20), a polynomial equation for
can be obtained
(21)

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GAO et al.: APPROACH TO DETERMINE SMALL-SIGNAL MODEL PARAMETERS FOR INP-BASED HBT141
with
In general, there will be three solutions for
physical (complex or large than
the smaller one of the real solutions. With a sequence, substi-
tuting the value of
into (10), (18), and (19), all unknown
parameters are obtained.
, two are non-
). The physical solution is
D. Determination of Intrinsic Elements
Once the extrinsic elements are obtained, the intrinsic ele-
ments are determined as follows after de-embedding the effects
of the parasitic elements:
(22)
(23)
(24)
(25)
(26)
(27)
(28)
(29)
Fig. 4. Algorithm.
E. Optimization Procedure
Also,the extractedparasitic elementscan be considered asan
initial guess of an optimization procedure, and the intrinsic ele-
ments determined by using the analytical method are described
as functions of the parasitic elements. A flowchart of the itera-
tive process is shown in Fig. 4.
III. RESULTS AND DISCUSSION
To illustrate the above method, we present the extracted
model parameters for several 5
S-parameter measurements for model extraction and verifica-
tion were made up to 40 GHz for InP HBT using an Agilent
8510C network analyzer with dc bias supplied by Agilent
4156A. All measurements were carried out on a wafer using
Cascade Microtech’s Air-Coplanar Probes ACP50-GSG-100,
with all instruments under IC CAP software control. Fig. 5
shows the S-parameter measurement system.
Theextractedcapacitances
at low frequency are shown in Fig. 6 for InP HBT. Fig. 7 shows
theplotsof
,
versusfrequencyforInPHBT.Ratherconstantvaluescanbeob-
served. In order to eliminate the second-order effects,
, and
at the middle frequency range. Therefore, all the factors of the
polynomial equation of
in (21) can be obtained, and
will be extracted from (10) directly. The series inductances and
resistances, i.e.,
,,,
5 m InP HBTs [15]. The
, ,and
,and
,
should be extracted
, , and are determined by

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142IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, VOL. 19, NO. 1, FEBRUARY 2006
Fig. 5. S-parameter measurement system.
Fig. 6. Extracted capacitances for 5?5 ?m InP HBT under cutoff condition.
Fig. 7. Plots of ????
frequency for InP HBT under cutoff condition.
?, ???????, and ??????????? versus
using an open-collector method. The above model parameters
are regarded as the initial values for optimization by using ADS
software without programming. The intrinsic elements are de-
scribed as functions of the parasitic elements. All the extrinsic
elements are summarized in Table II.
On the basis of the equivalent circuit method developed, we
investigate the intrinsic element characteristics of the small-
signal equivalent circuit model for the metamorphic InP HBT
operating at different active biases.
Fig. 8 shows the magnitude of the current gain
frequency, and
increases with injection level and de-
versus
TABLE II
EXTRACTED EXTRINSIC ELEMENTS
Fig. 8. Extracted ?????? versus frequency at ?? ? V.
Fig. 9. Extracted ?
versus frequency at ? ? ? V.
creases with frequency.
of
at low frequency.
Fig. 9 shows the extracted 3-dB rolloff frequency versus fre-
quency. It can be observed that
can be obtained by taking the value
increases when increases.