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Microwave power GaAs MISFET's with undoped AlGaAs as an insulator
Abstract
A metal-insulator-semiconductor field-effect transistor using an undoped AlGaAs layer as an insulator has been fabricated and RF tested. Due to the higher breakdown field of the wide-band-gap AlGaAs, the gate breakdown voltage has been greatly improved as compared with a conventional GaAs MESFET. The prebreakdown gate leakage current of this new device structure is also much lower than that of the MESFET. The presence of the gate insulator also reduces the gate capacitance. All these factors result in a GaAs power FET structure with potentials for high power, efficiency, and frequency of operation. An unoptimized 750-µm gate-width device achieved an output power of 630 mW with 7-dB gain and 37-percent power-added efficiency at 10 GHz. At reduced output power levels, power-added efficiency as high as 46-percent was obtained at X-band.
... Growing the insulator on AlGaAs/GaAs (InAlAs/InGaAs) heteros tructure improves the device performance further, as this device is attributed to MIS structure as well as heterostructure. MISFET's with different types of insulators layers (LT AlGaAs (InAlAs) layer on GaAs (InGaAs/ InP or InP) or MIS like structure [10][11][12][13][14][15][16][17][18][19][20][21][22][23][24][25][26][27][28][29]) have been fabricated and have shown some success [12] to improve the power performance of FET's. Improved breakdown voltages and power capability have been demonstrated for these MISFET's compared to conventional MES FET's and HEMT's. ...
A new analytical model has been proposed for predicting the sheet carrier density of Metal insulator Semiconductor High Electron Mobility Transistor (MISHEMT). The model takes into account the non-linear relationship between sheet carrier density and quasi Fermi energy level to consider the quantum effects and to validate it from subthreshold region to high conduction region. Then model has been formulated in such a way that it is applicable to MESFET/HEMT/MISFET with few adjustable parameters. The model can also be used to evaluate the characteristics for different gate insulator geometries like T-gate etc. The model has been extended to forecast the drain current, conductance and high frequency performance. The results so obtained from the analysis show excellent agreement with previous models and simulated results that proves the validity of our model.
... MESFET's, and this value was only 20 V for GaAs MESFET's. The B V g d of Gao 5lIno 4gP MESFET's is higher than that (19-20 V) obtained from GaAs MISFET's with undoped AlGaAs as an insulator [12] and that (25 V) from LTG GaAs MESFET's [9] and comparable to that (42 V) from LTG GaAs MESFET's with overlapping gate structure [9]. The high-breakdown characteristics of Gao 511no 49P MESFET's are attributed to their substantially higher breakdown field (high Eg) compared to GaAs. ...
The first Ga/sub 0.51/In/sub 0.49/P channel MESFETs grown on a (100) GaAs substrate by GSMBE have been fabricated. A high gate-to-drain breakdown voltage of 42 V with a high maximum current density (320 mA/mm) was achieved. This result demonstrates that high-breakdown voltage could be attained by using Ga/sub 0.51/In/sub 0.49/P as the channel material. We also measured a high-maximum oscillation frequency (f/sub max/) of 30 GHz for a 1.5 /spl mu/m gate-length device. This value is quite high compared with other high-breakdown-voltage GaAs MESFET's or MISFET's with the same gate length.
Ga0.51In0.49P/GaAs MISFET's, in which a Ga0.51In0.49P insulating layer was inserted between the gate metal and the channel layer, were compared with MESFET's experimentally and theoretically in terms of de and microwave performance, Devices performance were evaluated by varying the thickness of the insulating layer, Wide and flat characteristics of g(m), f(t), and f(max), versus drain current (or gate voltage) together with a high maximum current density (above 610 mA/mm) were achieved for devices with insulating layer thickness of 50 nm and 100 nm, Moreover, the maximum values of f(t)'s and f(max)'s for a 1-mu m gate length device both occurred when t was between 50 and 100 nm, We also observed that parasitic capacitances and gate leakage currents were minimized by using the airbridge gate structure, and thus high-frequency and breakdown characteristics were greatly improved. These results demonstrate that Ga0.51In0.49P/GaAs airbridge gate MISFET's with insulating layer thickness between 50 and 100 mm were very suitable for microwave high-power device applications.
The linearities of pseudomorphic Al0.3Ga0.7As/ In0.2Ga0.8As doped-channel FET's were characterized by comparing the characteristics of modulation-doped field-effect transistors (FET's) based on de and microwave evaluations. By using an undoped high-bandgap layer beneath the gate, the so-called parasitic MESFET-type conduction, which is common in HEMT's, can therefore be eliminated in doped-channel designs, Therefore, a wide and flat device performance together with a high current driving capability can be achieved in DCFET's. This linearity improvement in device performance suggests that doped-channel designs are more suitable for application in microwave power devices.
The first Ga(0.51)In(0.49)sP/GaAs inverted-structure HEMTs have been fabricated and measured. High drain-to-source breakdown voltage similar to 20V and gate-to-drain breakdown voltage similar to 26V was achieved by using the GaInP passivation layer. Preliminary results on mobility and g(m) have been obtained. By further optimization of crystal growth and device fabrication, GaInP/GaAs I-HEMT can be used as a high gain, high speed, and high breakdown (power) device.
A new power MISFET with undoped GaAs-Al0.3Ga0.7As superlattice gate “insulator” and buffer structure has been fabricated successfully. The superlattice gate “insulator” exhibits a much higher gate breakdown voltage( >35V) with very low prebreakdown leakage current and a lower gate capacitance (C ). Due to the existence of gate “insulator”, a higher carrier concentration can be employed in the active channel which improves the output drain current capability and transconductance. If the gate length is reduced to 1 um, a higher transconductance up to 330 mS/mm can be expected.
The insertion of superlattice buffer structure, between active channel and buffer layer offers an excellent carrier confinement barrier and gives an interface degraded region smaller than 40A. In addition, the superlattice buffer structure can getter greatly deep level impurities and defects from substrate or buffer layer. In summary, the proposed MISFET structure is suitable for high power, high frequency and low noise applications.
Dimethylaluminum methoxide (DMAIMO) was used as a deep level dopant source in GaAs epilayers grown by organometallic vapor phase epitaxy (OMVPE). The compound is stable, does not exhibit gas phase reactions in all investigated deposition conditions, and does not degrade surface morphology. Incorporation of aluminum and oxygen into the epilayer was studied by secondary ion mass spectroscopy (SIMS) on multi-layered samples as a function of growth conditions: growth temperature, reactor pressure, dopant mole fraction in the gas phase, and growth rate.
In this paper we report on a self-aligned gate buried-channel Al0.22Ga0.78As/GaAs heterostructure field-effect transistor (BC-HFET). The BC-HFET comprises a selectively ion-implanted channel and an undoped i-AlGaAs surface layer. In order to realize the buried channel heterostructure, a combined process of ion-implantation and epitaxial growth is developed. The post-implantation annealing before the epitaxial growth successfully reduces the interdiffusion at the heterointerface between the ion-implanted GaAs channel and the AlGaAs surface layer. The BC-HFET overcomes the disadvantages of a low breakdown voltage which exists in conventional self-aligned gate MESFETs. The BC-HFET exhibits a high breakdown voltage of 8 V and a high Schottky barrier height of 0.75 eV. The 1-mm-wide power BC-HFET demonstrates an output power of 18.2 dBm and a drain efficiency of 50% at a low adjacent channel leakage power of -59 dBc for a 1.9-GHz pi/4-shifted quadrature phase shift keying (QPSK) modulated input, for use as Personal Handy-phone System handsets.
In this paper, we demonstrate the influence of channel doping profile on the performances of camel-gate field effect transistors (CAMFETs). For comparison, single and tri-step doping channel structures with identical doping thickness products are employed, while other parameters are kept unchanged. The results of a theoretical analysis show that the single doping channel FET with lightly doping active layer has higher barrier height and drain-source saturation current. However, the transconductance is decreased. For a tri-step doping channel structure, it is found that the output drain-source saturation current and the barrier height are enhanced. Furthermore, the relatively voltage independent performances are improved. Two CAMFETs with single and tri-step doping channel structures have been fabricated and discussed. The devices exhibit nearly voltage independent transconductances of 144 mS mm−1 and 222 mS mm−1 for single and tri-step doping channel CAMFETs, respectively. The operation gate voltage may extend to ± 1.5 V for a tri-step doping channel CAMFET. In addition, the drain current densities of > 750 and 405 mA mm−1 are obtained for the tri-step and single doping CAMFETs. These experimental results are inconsistent with theoretical analysis.
A new power FET with a hybrid (MESFET and MD) operation mechanism was fabricated successfully. The insertion of a modulation-doped (MD) structure between the AlGaAs buffer and GAaS active layer gives high output current and high transconductance. By reducing the gate length to 1 micron, a transconductance of up to 340 mS/mm can be expected. Futhermore, the use of an undoped AlGaAs/GaAs superlattice 'gate insulator' provides low leakage current and much higher gate breakdown voltage. From the experimental results, it is obvious that the proposed structure is suitable for high power applications.
This article deals with the application of the AlGaAs-GaAs DMT principle to the millimeter wave range. It is based on two technological realizations and related characterizations. An Idss of 700 mA/mm and a 10-12-V breakdown voltage are demonstrated. Power measurements indicate an output-power capability of about 0.5 W/mm at 30 GHz.
We report experimental and theoretical results obtained for pseudomorphic InGaAs Doped Channel Heterostructure FETs (DCHFET) that demonstrate the advantages of this device over other heterostructure FETs. We demonstrate high transconductance beta value, and saturation current and low output conductance and subthreshold current. These improvements are due to a higher density of carriers in the channel, the carrier confinement in the quantum well device structure, and the superior transport properties of InGaAs. Transconductances of 350 mS/mm and beta-values of 440 mS/V-mm were measured for 1-µm enhancement mode DCHFETs. Transconductances as high as 471 mS/mm and drain saturation currents as high as 660 mA/mm were measured for 0.6 µm depletion mode DCHFETs.
A new power metal–semiconductor field effect transistor (MESFET) with employing the superlattice structure in the gate and buffer has been fabricated successfully by molecular‐beam epitaxy. The use of undoped GaAs–Al 0.3 Ga 0.7 As superlattice gate insulator results in much smaller gate to source parasitic capacitance (C gs ) and leakage current and higher gate to drain breakdown voltage (25–30 V) than conventional MESFET’s. Furthermore, the existence of graded superlattice buffer provides higher saturation current and much smaller velocity degradation region than those of AlGaAs buffer MESFET’s. By the improvement of C gs and transconductance, the cutoff frequency is expected to be higher. Due to the increasing of gate breakdown voltage and saturation current, the output power drivability is improved. In summary, the demonstrated superlattice gate and graded superlattice buffer structure is suitable for low‐noise, high‐frequency, and high‐power application.
A novel four‐terminal device TBGFET (top‐back‐gate field‐effect transistor) grown by MBE is fabricated. An n<sup>+</sup> Sn‐doped GaAs buried contact layer is grown on a Cr‐doped semi‐insulating substrate first, and an undoped Al 0.4 Ga 0.6 As insulating layer and Sn‐doped GaAs channel are grown subsequently. Nonselective mesa etch is used as device isolation and selective etch is adopted to open the back‐gate contact window. TBGFET works as a MESFET and MISFET with a common channel but separately controlled by top gate and back gate. We can adjust the transconductance and current level at room temperature as we wish by properly applying negative bias to the back gate or top gate. The top gate threshold voltage V t =-1.6 V and back gate threshold voltage V bt =-5.4 or -1.5 V are obtained. Either V t or V bt can be changed without influencing the other one. Based on the above properties, a number of applications of TBGFET are proposed.
Unintentionally doped layers of (Al x Ga 1-x ) y In 1-y P with energy gaps of approximately 2.0 eV were grown lattice matched to GaAs by organometallic vapor phase epitaxy. These layers were high resistivity. Current‐voltage (I‐V) and capacitance‐voltage (C‐V) measurements were made on Cr/Au (Al x Ga 1-x ) y In 1-y P‐GaAs metal‐insulator‐semiconductor capacitors. These measurements gave a ln I variation with V<sup>1</sup><sup>/</sup><sup>2</sup> as observed for insulators such as Si 3 N 4 on Si. This conduction behavior is characteristic of the Frenkel–Poole effect which is the electric field enhanced thermal excitation of trapped electrons into the conduction band. The C‐V measurements were similar to the small hysteresis behavior of high‐resistivity oxygen‐doped Al x Ga 1-x As on GaAs.
The fabrication and current‐voltage characteristics of the first depletion‐mode field‐effect transistors based on a pseudomorphic ZnSe/n‐GaAs heterointerface are described. The devices are doped‐channel field‐effect transistors produced by means of interrupted growth with the use of two separate molecular beam epitaxy systems. Very strong (visible to the naked eye) reflection high‐energy electron diffraction intensity oscillations persist for 120 periods when ZnSe is nucleated on the GaAs epilayer. The current‐voltage characteristics of the transistors are close to ideal; channel modulation indicates that the Fermi level is not pinned at the ZnSe/GaAs interface.
A new metal-insulator-semiconductor field effect transistor (MISFET) structure has been proposed in this paper. The use of an undoped GaAsAl0.3Ga0.7As superlattice gate “insulator” provides a much higher gate breakdown voltage (above 36V) with a very low pre-breakdown leakage current. As a result of the existence of this gate “insulator”, a higher carrier concentration can be employed in the active channel which improves the output drain current capability and transconductance. If the gate length is reduced to 1 μm, a higher transconductance up to 330 mS mm−1 can be expected. The insertion of a superlattice buffer structure between the active channel and buffer layer offers an excellent carrier confinement barrier and gives a degraded interface region smaller than 40 Å. In addition, the superlattice buffer structure can getter deep level impurities and defects from the substrate or buffer layer. In summary, the proposed MISFET structure is suitable for high power and low noise applications.
The first Ga0.51In0.49P/GaAs inverted-structure high electron mobility transistors (I-HEMT) and insulated-gate inverted-structure high electron mobility transistors (I2HEMT) grown by gas source molecular beam epitaxy (GSMBE) have been fabricated and measured. Very high drain-to-source breakdown voltage was obtained in the I-HEMT (23 V) and I2HEMT (13 V). The maximum gms achieved for I-HEMT and I2HEMT were 120 and 100 mS/mm at room temperature, respectively. No I-V collapse was observed at 77 K. The high breakdown characteristics were attributed to the use of a high band gap GaInP passivation layer between the gate and drain. These results indicate that Ga0.51In0.49P/GaAs I-HEMT and I2HEMT are promising to be used as high breakdown (high power) devices.
A new GaAs MISFET with superlatticed gate “insulator” and transition buffer layer structure is proposed in this paper. The use of an undoped GaAsAl0.3Ga0.7As superlatticed gate “insulator” provides a high gate breakdown voltage ( > 36 V) with very low prebreakdown leakage current and a low gate capacitance (Cgs), compared to usual MESFET devices. Due to the existence of the gate “insulator”, a high carrier concentration can be employed in the active channel, which improves the outer-drain-current capability and transconductance (over 200 mS/mm can be expected if the gate length is reduced to 1 μm). Also three different transition-buffer layers i.e. superlattice, graded superlattice and modulation-doped (MD) structures have been inserted between the active-channel and buffer layer respectively, to offer an excellent carrier confinement (to obtain a small interface degraded region) or to enhance the electrical performance of the active channel. Finally, the IV characteristics, output conductance and transconductance gm of the superlatticed gate FETs with different transition-buffer layers are investigated and compared. From the experimental results, it is clear that the proposed structures are suitable for power application.
Describes a model used for the design of doped channel pseudomorphic AlGaAs/InGaAs/GaAs quantum-well HIGFETs and for the simulation of digital integrated circuits based on these devices. The model is based on the self-consistent quantum mechanical calculation of subbands and electron density in InGaAs quantum wells, obtained by solving a one-dimensional effective mass Schrodinger equation. Such a calculation shows that the potential barrier between the quasi-Fermi level in the channel and the bottom of the conduction band in the barrier layer is considerably larger for the doped-channel structure. This lowers the thermionic emission gate current of the doped channel device compared to the undoped channel structure, as confirmed by experimental data. The authors measured peak transconductance g <sub>m</sub>=471 mS/mm and peak l <sub>dsat</sub>=660 mA/mm in 0.6-μm-gate doped-channel services. These results demonstrate the advantages of the DCHFET over the standard MODFET structure and their potential for high speed IC applications
Metal-insulator-semiconductor field effect transistors (MISFETs)
using low temperature (LT) GaAs as the insulator layer were fabricated
and characterized. In this study, the influence of the AlAs spacer layer
on MISFET properties is explored. Structures were grown with the
thickness of the AlAs layer varied from 0 to 30 nm with the remainder of
the total 60 nm insulator layer composed of LT GaAs. Two control
structures were also grown, a standard metal semiconductor field effect
transistor (MESFET) and a MISFET with a 50 nm
Al<sub>0.80</sub>Ga<sub>0.20</sub>As insulator layer. Transistors with
1.2×200 μm gates and 5 μm source drain spacings were
fabricated using standard processing techniques. Breakdown voltages as
high as 48 V were found for the LT MISFETs, compared to 5 V for the
MESFET and 12 V for the Al<sub>0.80</sub>Ga<sub>0.20</sub>As MISFET. The
detailed characterization of the breakdown, along with the effects of
the various insulating layers on other FET parameters such as current,
transconductance, and cutoff frequency, is described
The previously reported GaAs/AlGaAs heterojunction MISFET with an undoped AlGaAs layer as an insulator has been further optimized for power operation at upper Ku band. A 300-µm gate-width device generated 320 mW of output power with 33-percent efficiency at 18.5 GHz. The corresponding power density exceeds 1 W/mm. When optimized for efficiency, the device has achieved a power added efficiency of 43 percent at 19 GHz.
A novel structure Ga/sub 0.51/In/sub 0.49/P/GaAs MISFET with an undoped Ga/sub 0.51/In/sub 0.49/P layer serving as the airbridge between active region and gate pad was first designed and fabricated. Wide and flat characteristics of g/sub m/ and f/sub max/ versus drain current or gate voltage were achieved. The device also showed a very high maximum current density (610 mA/mm) and a very high gate-to-drain breakdown voltage (25 V). Parasitic capacitances and leakage currents were minimized by the airbridge gate structure and thus high f/sub T/ of 22 GHz and high f/sub max/ of 40 GHz for 1 /spl mu/m gate length devices were attained. To our knowledge, both were the best reported values for 1 /spl mu/m gate GaAs channel FET's.< >
A GaAs layer grown by molecular beam epitaxy at 200 degrees C is used as the gate insulator for GaAs MISFETs. The gate reverse breakdown and forward turn-on voltages, are improved substantially by using the high-resistivity GaAs layer between the gate metal and the conducting channel. It is shown that a reverse bias of 42 V or forward bias of 9,3 V is needed to reach a gate current of 1 mA/mm of gate width. A MISFET having a gate of 1.5*600 mu m delivers an output power of 940 mW (1.57-W/mm power density) with 4.4-dB gain and 27.3% power added efficiency at 1.1 GHz. This is the highest power density reported for GaAs-based FETs.< >
The physical operation of heterostructure
metal-insulator-semiconductor field-effect transistors (H-MISFETs) is
described and compared with that of more familiar heterostructure FETs.
Undoped, doped-channel, and quantum-well MISFETs based on AlGaAs-GaAs
heterostructures are examined. The focus is on quantum-well MISFETs,
which differ most from more conventional devices. Results are presented
of experiments and simulations carried out to study the physical
mechanisms related to charge control, gate leakage, device geometry,
short-channel effects, buffer leakage, and electron trapping in the
devices, and the advantages of other III-V materials systems are
described. The potential advantages of H-MISFETs are discussed in terms
of particular circuit applications
A simple numerical technique for calculating reverse breakdown voltage in GaAs MESFET's is described. The breakdown voltage is determined from an integral over the ionization rate and requires only a small amount of computing time, allowing a variety of structures to be studied. The effects of a gate recess and n<sup>+</sup>layer, the surface potential, buried channel layers, and AlGaAs spacer layers underneath the gate are investigated.
A novel four-terminal device, the top back gate FET (TBGFET) grown by MBE is fabricated. A n<sup>+</sup>Sn-doped GaAs buried-contact layer is grown on Cr-doped SI first, and an undoped Al 0.4 - Ga 0.6 As insulating layer and Sn-doped GaAs channel are grown subsequently. Nonselective mesa etch is used for device isolation and selective etch is adopted to open the back-gate contact window. TBGFET Works as a MESFET and MISFET with a common channel, but can be separately controlled by the top gate and the back gate. We can adjust the transconductance and current level at room temperature as we wish by properly applying negative bias to the back gate or top gate. The top-gate threshold voltag V_{t} = -1.6 V and back-gate threshold voltage V bt from -0.5 to -10 V are obtained under different insulator thickness and trap density. If a proper criterion is satisfied, either top-gate threshold voltage V t or back-gate threshold voltage V bt can be independently chosen without influencing each other. The decoupling of V t and V bt are well explained by the Lampert's law of the trap-fill-limited carrier injection in semi-insulator. The device interaction with light is also investigated. It is foUnd that the back-gate threshold voltage shift as well as the conduction current enhancement is caused principally by photon-induced detrapping in the semi-insulated AlGaAs layer. Photon generated e-h pairs in the device channel play a minor role either in current enhancement or in back-gate threshold voltage shift. Both Delta V_{bt} and Delta I_{ds} are increased with the light intensity and tend to saturate at some fixed values. Based on the above properties, a number of applications of TBGFET in digital and microwave circuit are proposed.
Ga<sub>0.51</sub>In<sub>0.49</sub>P/GaAs MISFET's, in which
Ga<sub>0.51</sub>In<sub>0.49</sub>P insulating layer was inserted
between the gate metal and the channel layer, were compared with
MESFET's experimentally and theoretically in terms of DC and microwave
performance. Devices performance were evaluated by varying the thickness
of the insulating layer. Wide and flat characteristics of g<sub>m</sub>,
g<sub>t</sub>, and f<sub>max</sub> versus drain current (or gate
voltage) together with a high maximum current density (above 610 mA/mm)
were achieved for devices with insulating layer thickness of 50 mn and
100 mm. Moreover, the maximum values of J<sub>t</sub>'s and f<sub>max
</sub>'s for a 1-μm gate length device both occurred when t was
between 50 and 100 mn. We also observed that parasitic capacitances and
gate leakage currents were minimized by using the airbridge gate
structure, and thus high-frequency and breakdown characteristics were
greatly improved, These results demonstrate that
Ga<sub>0.51</sub>In<sub>0.49</sub>P/GaAs airbridge gate MISFET's with
insulating layer thickness between 50 and 100 mn were very suitable for
microwave high-power device applications
The linearities of pseudomorphic
Al<sub>0.3</sub>Ga<sub>0.7</sub>As/In<sub>0.2</sub>Ga<sub>0.8</sub>As
doped-channel FET's were characterized by comparing the characteristics
of modulation-doped field-effect transistors (FET's) based on dc and
microwave evaluations. By using an undoped high-bandgap layer beneath
the gate, the so-called parasitic MESFET-type conduction, which is
common in HEMT's, can therefore be eliminated in doped-channel designs.
Therefore, a wide and flat device performance together with a high
current driving capability can be achieved in DCFET's. This linearity
improvement in device performance suggests that doped-channel designs
are more suitable for application in microwave power devices
The results of experimental and theoretical studies of
pseudomorphic AlGaAs/InGaAs/GaAs quantum-well doped-channel
heterostructure field effect transistors (QW-DCHFETs) are presented. The
channel doping was introduced in two ways: during growth by molecular
beam epitaxy or by direct ion implantation. The latter technique may be
advantageous for fabrication of complementary DCHFET circuits. Peak
transconductances of 471 mS/mm and peak drain currents of 660 mA/mm in
0.6-μm-gate doped-channel devices were measured. The results show the
advantages of the DCHFET over standard heterostructure FET structures
and their potential for high-speed IC applications. Self-consisted
calculations of the subband structure show that the potential barrier
between the quasi-Fermi level in the channel and the bottom of the
conduction band in the barrier layer is considerably larger for the
doped channel structure than for the structure with an undoped channel.
This lowers the thermionic emission gate current of the doped channel
device compared to the undoped channel device
The characteristics of a proposed two-layer short-channel FET structure are analyzed and compared with those of the conventional structure. The new structure provides improved amplifier linearity and enhanced unity-current-gain frequency. Suitable combinations of doping in the two layers and gate-to-drain electrode separation can effectively reduce the device noise arising due to hot electrons.
A new two-dimensional electron gas (2DEG) field-effect transistor (FET) which operates in an MOS transistor-like mode is fabricated on undoped AlGaAs-GaAs heterostructures grown by both molecular beam epitaxy and organometallic vapour phase epitaxy. This device with very simple structure is expected to have performance comparable to those of selectively doped heterostructure FETs and can easily be integrated.
Metal‐insulator‐semiconductor (MIS) structures were prepared with high‐resistivity oxygen‐doped Al 0.5 Ga 0.5 As layers on n‐type GaAs. These layers were grown by molecular‐beam epitaxy (MBE). Capacitance‐voltage measurements of MIS structures on both conducting and high‐resistivity substrates demonstrate the achievement of deep depletion for reverse‐bias and a near‐flatband condition at zero bias. Measurement of the output characteristics of a majority‐carrier depletion mode MISFET illustrates the application of this MIS technique to three terminal devices. The presence of a 2000‐Å‐thick O‐doped Al 0.5 Ga 0.5 As layer on n‐type GaAs was found to enhance the photoluminescent intensity of the n‐GaAs layer by 52 times over that of an exposed GaAs surface. The measurements described here demonstrate that the use of single‐crystal lattice‐matched heterojunctions of O‐Al 0.5 Ga 0.5 As–n (GaAs) avoids large interface state densities. Admittance spectroscopy measurements permitted assignment of the dominant deep level in O‐doped Al 0.5 Ga 0.5 As as 0.64±0.04 eV.
GaAs semi-insulated-gate f.e.t.s (s.i.g.f.e.t.s) have been fabricated by Ar+ bombardment in the gate region. The d c. characteristics and microwave performance are compared with those of conventional power m.e.s.f.e.t.s fabricated from the same slice. Up to 2.9W output power with 4dB gain has been obtained from s.i.g.f.e.t. devices at 8 GHz.
State-of-the-art GaAs MESFET'S exhibit an output power saturation as the input power is increased. Experiments indicated that this power saturation is due to the combined effects of forward gate conduction and reverse gate-to-drain breakdown. This reverse breakdown was studied in detail by performing two-dimensional numerical simulations of planar and recessed-gate FET's. These simulations demonstrated that the breakdown occurs at the drain-side edge of the gate. The results of the numerical simulations suggested a model of the depletion layer configuration which could be solved analytically. This model demonstrated that the breakdown voltage was inversely proportional to the product of the doping level and the active layer thickness.
A review of recent and current work on GaAs insulated-gate technology is presented. First, various techniques for the formation of heteromorphic and homomorphic dielectrics are outlined and some important aspects of properties of these dielectrics are reviewed. Second, MOSFET structures, fabrication procedures, and microwave performance are described. Third, the application of GaAs MOSFET's to digital integrated circuits is summarized.
The onset of gate-drain avalanche imposes an important fundamental constraint on the drain voltage swing, and hence, on the output power of GaAs FET's. In this paper we show that recognition of the role of surface depletion and proper attention to channel design can yield avalanche voltage factors of 2-3 above bulk values. The appropriate design strategy is minimization of the undepleted epitaxial charge per unit area (Q u ) between gate and drain, which, in turn, dictates a gate-notch depth approximately equal to the surface zero-bias depletion depth. A simple lateral spreading model is proposed which predicts that V_{L} sim 50Qmin{u}max{-1} , where V L is the gate-drain avalanche voltage and Q u is measured in units of 10<sup>12</sup>electrons/cm<sup>2</sup>. This prediction is supported by a large body of experimental dc and pulse data, although considerable scatter is observed which we have attributed to epi charge nonuniformities, premature avalanche at the rough edges of AI gates formed by a liftoff process, and surface charging variations associated with dielectric passivation. The observed dependence of V L on epi charge rather than on doping level, as predicted for bulk avalanche, provides convincing evidence for nonbulk two-dimensional avalanche in the thin-film ( Q_{u} < 2.3 ) FET geometry. In thick films ( Q_{u} > 2.6 ), on the other hand, it is found that the bulk avalanche predictions are reasonably accurate. In terms of saturated epi current I s , the bulk regime corresponds to I_{s} > 450 mA/mm and the lateral spreading (thin-film) regime to I_{s} < 400 mA/mm. Finally, we have found that gate-drain avalanche is the major cause of output saturation as a function of drain potential in power GaAs FET's.
The microwave performance of a GaAs MESFET, where a buffer layer of a low carrier concentration is inserted between the gate metal and the channel layer, is calculated and compared with that of a conventional MESFET. It is found that the use of such a high-resistivity buffer layer contributes to a great improvement of the microwave performance of the GaAs MESFET, especially in f T and f_{max} .
Proton bombardment has been used to make a semi- insulated gate gallium-arsenide field-effect transistor. This technique combines the simplicity of the metal semiconductor FET technique, the advantage of operating the device using positive as well as negative bias on the gate, and the possible use of higher conductivity material for the channel, which may result in a higher transconductance and a higher saturated current density. Copyright © 1972 by The Institute of Electrical and Electronics Engineers, Inc.
IEEE Trans. Electron Devices
- M B Das
- P Esqueda
IEEE Electron Devices
- T Mimura
- M Fukuta