Article

Count-based BIST compaction schemes and aliasing probability computation

Dept. of Electr. Eng., British Columbia Univ., Vancouver, BC
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (impact factor: 1.27). 07/1992; DOI:10.1109/43.137522 pp.768 - 777
Source: IEEE Xplore

ABSTRACT The authors present a unified probabilistic model of count-based
compaction that relates the probability of occurrence of the counted
events to a circuit's fault detection probabilities. This model allows
an identical treatment of all the different count-based techniques
proposed to date, e.g. ones, transitions, edges, and spectral
coefficients, by essentially reducing all techniques to simple
ones-counting. From a Markov model of ones-counting, the authors derive
asymptotic aliasing probabilities, and for finite test sequence lengths
they developed a computation technique for determining the aliasing
associated with the specifically mentioned schemes, as well as more
general count-based compaction techniques, under various error models

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Keywords

authors present
 
circuit's fault detection probabilities
 
computation technique
 
count-based
 
different count-based techniques
 
finite test sequence lengths
 
general count-based compaction techniques
 
identical treatment
 
Markov model
 
techniques
 
transitions
 
various error models
 

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