Article

Design of Low-Density Parity-Check Codes for Modulation and Detection

Bell Labs., Crawford, NJ, USA
IEEE Transactions on Communications (Impact Factor: 1.98). 05/2004; 52(4):670 - 678. DOI: 10.1109/TCOMM.2004.826370
Source: IEEE Xplore

ABSTRACT A coding and modulation technique is studied where the coded bits of an irregular low-density parity-check (LDPC) code are passed directly to a modulator. At the receiver, the variable nodes of the LDPC decoder graph are connected to detector nodes, and iterative decoding is accomplished by viewing the variable and detector nodes as one decoder. The code is optimized by performing a curve fitting on extrinsic information transfer charts. Design examples are given for additive white Gaussian noise channels, as well as multiple-input, multiple-output (MIMO) fading channels where the receiver, but not the transmitter, knows the channel. For the MIMO channels, the technique operates within 1.25 dB of capacity for various antenna configurations, and thereby outperforms a scheme employing a parallel concatenated (turbo) code by wide margins when there are more transmit than receive antennas.

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    • "In this work, we analytically study the criterion for matching 44 the source statistics with source coding rate using an innovative 45 PEXIT chart technique. EXIT chart [11] is an accurate and con-46 venient tool for predicting the performance of LDPC codes. It 47 was introduced into D-LDPC code systems in [1] and extended 48 to P-LDPC codes in [12] as PEXIT chart. "
    IEEE Wireless Communication Letters 09/2015; 19(9).
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    • "In this work, we analytically study the criterion for matching 44 the source statistics with source coding rate using an innovative 45 PEXIT chart technique. EXIT chart [11] is an accurate and con-46 venient tool for predicting the performance of LDPC codes. It 47 was introduced into D-LDPC code systems in [1] and extended 48 to P-LDPC codes in [12] as PEXIT chart. "
    • "where ¯ d v is the average column weight of the LDPC code, and the expression of J(·) function is given in [5]. If we use R to denote the intersection of T A and T VND , and S the intersection of T B and T VND , the decoding process can be visualized by a trajectory between R and S, as shown in Fig. 5. "
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    ABSTRACT: The low-density parity-check (LDPC) coded bit-interleaved coded modulation with iterative demapping (BICM-ID) has excellent bit error rate (BER) performance, but with extremely high receiver complexity. This letter proposes a three-stage full-parallel receiver architecture in which each component decoder is separately but simultaneously iteratively decoded. This architecture can make full use of the computing resources and improve the system performance without sacrificing the throughput. Three-dimensional (3-D) extrinsic information transfer (EXIT) analysis and BER simulations are carried out to demonstrate the superiority of the proposed new receiver architecture.
    IEEE Communications Letters 07/2015; 19(7):1-1. DOI:10.1109/LCOMM.2015.2426694 · 1.46 Impact Factor
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