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IEICE TRANS. FUNDAMENTALS, VOL.E88–A, NO.6 JUNE 2005

1631

LETTER

Finding All DC Operating Points of Piecewise-Linear Circuits

Containing Neither Voltage nor Current Controlled Resistors

Kiyotaka YAMAMURA†a), Member and Daiki KAYA†∗, Nonmember

SUMMARY

finding all characteristic curves of one-port piecewise-linear resistive cir-

cuits. Using these algorithms, a middle scale one-port circuit can be repre-

sented by a piecewise-linear resistor that is neither voltage nor current con-

trolled. In this letter, an efficient algorithm is proposed for finding all dc

operating points of piecewise-linear circuits containing such neither volt-

age nor current controlled resistors.

key words: dc analysis, characteristic curve, piecewise-linear circuit, find-

ing all solutions

Recently, efficient algorithms have been proposed for

1.Introduction

This letter deals with the problem of finding all dc operat-

ing points of piecewise-linear (PWL) resistive circuits con-

taining neither voltage nor current controlled resistors, i.e.,

resistors whose v-i characteristics are represented by multi-

valued PWL functions.

In general, large scale circuits contain several often

used subcircuits that have already been analyzed, for ex-

ample, logic gates, amplifiers, analog-to-digital converters,

filters, and so on. By specifying these subcircuits by sim-

ple macromodels, large scale circuits can be analyzed ef-

ficiently [1]. The idea of finding characteristic curves of

a one-port circuit and then modeling it by a neither voltage

nor current controlledresistor is one of suchapproaches(see

Fig. 1).

Fortunately, studies on algorithms for finding all char-

acteristic curves of one-port PWL resistive circuits (as well

as algorithms for finding all dc operating points) have re-

markably developed; for example, see the references cited

in [2]. Especially, the algorithm proposed in Sect.5 of [2]

succeeded in finding all characteristic curves of one-port cir-

cuits containing 200 PWL resistors in practical computation

time. Thus, it is now possible to represent middle scale one-

port circuits by PWL resistors that are neither voltage nor

current controlled.

In this letter, we propose an efficient algorithm for find-

ing all dc operating points of PWL circuits containing such

neither voltage nor current controlled resistors by extending

the algorithm proposed in Sect.3 of [2], which is one of the

most efficient algorithms for finding all operating points of

PWL circuits. Effectiveness of the proposed algorithm is

Manuscript received November 30, 2004.

Final manuscript received February 21, 2005.

†The authors are with the Faculty of Science and Engineering,

Chuo University, Tokyo, 112-8551 Japan.

∗Presently, the author is with NEC Electronics Co., Ltd.

a)E-mail: yamamura@elect.chuo-u.ac.jp

DOI: 10.1093/ietfec/e88–a.6.1631

Fig.1

Macromodeling of a one-port circuit.

confirmed by several numerical examples.

2.Parametric Representation of Piecewise-Linear Re-

sistors

For multi-valued PWL characteristics, it is often effective

to express the voltage and the current using a new variable

called a parameter. In this section, we introduce the para-

metric representation of PWL resistors proposed in [3].

We first introduce the following notation for a real

number λ:

λ+= max{λ,0},

Assume that we are given a one-dimensional PWL

curve in Rlcharacterized by a set of m + 1 breakpoints

x0, x1,···, xmand two directions x−∞and x+∞(see Fig. 2).

Then, the parametric representation can proceed as fol-

lows [3].

λ−= max{−λ,0}.

(1)

1. Assign a parameter λ running from −∞ to +∞.

2. The part between λ = −∞ and λ = 1 is given by:

x = x0+ x−∞· λ−+ (x1− x0)λ+.

3. The direction of the curve between x0and x1is x1−x0.

From λ = 1 onwards, the direction of the curve has

to be corrected. This can be done by adding a term

(x2− 2x1+ x0) · (λ − 1)+:

x = x0+ x−∞· λ−+ (x1− x0) · λ+

+(x2− 2x1+ x0) · (λ − 1)+.

This formula is now valid between λ = −∞ and λ = 2.

4. This is continued to describe the complete curve:

(2)

(3)

x = x0+ x−∞· λ−+ (x1− x0) · λ+

m

?

+

k=2

(xk− 2xk−1+ xk−2) · (λ − k + 1)+

Copyright c ? 2005 The Institute of Electronics, Information and Communication Engineers

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IEICE TRANS. FUNDAMENTALS, VOL.E88–A, NO.6 JUNE 2005

Fig.2

One-dimensional piecewise-linear curve.

+(x+∞− xm+ xm−1) · (λ − m)+.

Equation (4) gives a global closed-form expression for

the one-dimensional PWL curve. An extension to multi-

dimensional PWL resistors with more than one controlling

variable is also possible [4]. In [3], this parametric represen-

tation is used in order to formulate the circuit equation in a

form of the generalized linear complementarity problem.

(4)

3. Proposed Algorithm

For the sake of simplicity, and without loss of generality, we

assume that the circuit contains only one two-terminal PWL

resistor that is neither voltage nor current controlled, and

otherresistorsarecharacterizedbysingle-valuedPWLfunc-

tions. Then, under mild conditions on the network topol-

ogy, the circuit can be described by a hybrid equation of the

form [2],[5]:

f1(v,i, x2,···, xn) = 0

f2(v,i, x2,···, xn) = 0

...

fn(v,i, x2,···, xn) = 0

where v and i are the branch voltage and current (resp.)

of the neither voltage nor current controlled resistor, and

xi(i = 2,3,···,n) are the branch voltages or currents of

other PWL resistors. The v-i characteristic is given by a

one-dimensional PWL curve in R2characterized by a set of

m+1 breakpoints (v0,i0)T,(v1,i1)T,···,(vm,im)Tand two di-

rections (v−∞,i−∞)Tand (v+∞,i+∞)T. The system of n equa-

tions (5) has n+1 variables, and is separable in all variables.

Using the parametric representation, v and i are repre-

sented by

(5)

v = g(λ)

?= v0+ v−∞· λ−+ (v1− v0) · λ+

m

?

+(v+∞− vm+ vm−1) · (λ − m)+

i = h(λ)

?= i0+ i−∞· λ−+ (i1− i0) · λ+

m

?

+(i+∞− im+ im−1) · (λ − m)+.

+

k=2

(vk− 2vk−1+ vk−2) · (λ − k + 1)+

+

k=2

(ik− 2ik−1+ ik−2) · (λ − k + 1)+

(6)

Combining (5) and (6), we have a system of n+2 equations

in n + 2 variables:

f1(v,i, x2,···, xn) = 0

f2(v,i, x2,···, xn) = 0

...

fn(v,i, x2,···, xn) = 0

v − g(λ) = 0

i − h(λ) = 0.

Notice that g and h are single-valued PWL functions of λ

with m+2 segments, where the division points on the λ-axis

are λ = 0,1,2,···,m. Since the system of PWL equations

(7) is separable, the algorithm proposed in Sect.3 of [2] can

be applied with minor and trivial modifications. Note that

the algorithm proposed in [2] uses a powerful test (termed

the LP test using the dual simplex method) for nonexistence

of a solution in a given region, which is not only powerful

but also efficient and requires only a few pivotings per re-

gion. Using this test, many regions containing no solution

are excluded at an early stage of the algorithm, which makes

the algorithm very efficient.

If the v-i characteristic consists of several branches

(namely, several not connected curves), then we repeat the

above procedure for each branch.

(7)

4. Numerical Examples

We implemented the proposed algorithm using the program-

ming language C (double precision) on a Sun Blade 2000

(UltraSPARC-III Cu 1GHz). In this section, we show some

numerical examples.

Example 1: We first consider the circuit containing one

macromodel and n − 1 tunnel diodes as shown in Fig. 3,

where the v1-i1characteristic of the neither voltage nor cur-

rent controlled resistor is given by the PWL curve shown in

Fig. 4. This curve comes from Fig.7-7 of [5]. The charac-

teristics of other PWL resistors are given by approximating

the nonlinear function

i = 2.5v3− 10.5v2+ 11.8v

by a PWL function consisting of equally spaced 100 seg-

ments on [−5,5]. Denoting such a PWL function as p(v),

this circuit is described by a system of PWL equations:

i1+ v1+ v2+ ··· + vn− 1 = 0

p(v2) + v1+ v2+ ··· + vn− 2 = 0

...

p(vn) + v1+ v2+ ··· + vn− n = 0

v1− g(λ) = 0

i1− h(λ) = 0.

In the numerical experiment, we changed the value of n

from n = 10 to n = 200, and considered the initial region

(8)

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LETTER

1633

Fig.3

Example circuit 1.

Fig.4

The v1-i1curve associated with the PWL resistor in Fig. 2.

Table 1

Computation time of the algorithm (Example 1).

nLST (s)

10

20

30

40

50

60

70

80

90

100

110

120

130

140

150

160

170

180

190

200

1019

1039

1059

1079

1099

10119

10139

10159

10179

10199

10219

10239

10259

10279

10299

10319

10339

10359

10379

10399

7

7

9

11

11

9

9

11

11

9

9

15

9

11

13

9

13

11

9

13

0.1

1

4

13

34

72

134

239

389

635

1149

1637

2183

2963

3986

5171

6406

8176

11491

14052

[−60,60] for λ and [−5,5] for vi(i = 2,3,···,n). We did

not divide the initial region in i1and v1directions because

(8) is linear in these variables. Hence, the number of linear

regions on which (8) is linear is 10 · 100n−1= 102n−1.

Table 1 shows the result of computation, where L de-

notes the number of linear regions, S denotes the number

of operating points obtained by the algorithm, and T (s) de-

Fig.5

Example circuit 2.

Fig.6

Example circuit 3.

Fig.7

Example circuit 4.

Fig.8

Example circuit 5.

notes the computation time. As seenfrom this table, the pro-

posed algorithm found all operating points of this circuit for

n = 200 in about 4h. Thus, the proposed algorithm has the

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IEICE TRANS. FUNDAMENTALS, VOL.E88–A, NO.6 JUNE 2005

Fig.9

The v1-i1curve associated with the PWL resistor in Figs. 5–8.

Table 2

Computation time of the algorithm (Example 2).

Circuit

LST (s)

Fig.5

Fig.6

Fig.7

Fig.8

1017

1019

1031

1029

9

3

27

9

0.23

0.17

10.2

2.76

possibility to solve middle scale circuits containing macro-

models in practical computation time. The average number

of pivotings per region was 0.34–0.44; that is, the LP test

was performed very efficiently with averagely less than one

pivoting per region.

Example 2: We next consider the transistor circuits con-

taining one macromodel as shown in Figs. 5–8, where the v-

i characteristic of the neither voltage nor current controlled

resistor is given by the PWL curve shown in Fig. 9. Table 2

shows the result of computation. It is seen that all operating

points are found in little computation time. It is also seen

that the computation time depends largely on the number of

operating points.

5.Conclusion

In this letter, an efficient algorithm has been proposed for

finding all dc operating points of PWL circuits containing

neither voltage nor current controlled resistors. The pro-

posed algorithm is useful in analyzing PWL resistive cir-

cuits where subcircuits are modeled by multi-valued type

resistors. It will also be useful in mixed analog/digital sim-

ulation.

An extension to the case where subcircuits are mod-

eled by multi-dimensional PWL resistors with more than

one controlling variable will be possible using the idea pro-

posed in [4]. Detailed discussion should be left for future

research.

Acknowledgement

This work was supported in part by the 21st Cenury COE

Program “Research onSecurity andReliability in Electronic

Society” at Chuo University and the Grants-in-Aid for Sci-

entific Research No.14550374 from the Japanese Ministry

of Education, Culture, Sports, Science and Technology.

References

[1] A. Ushida and M. Tanaka, Computer Simulations of Electronic Cir-

cuits, Corona, Tokyo, 2002.

[2] K. Yamamura and S. Tanaka, “Finding all solutions of piecewise-

linear resistive circuits using the dual simplex method,” Int. J. Circuit

Theory Appl., vol.30, no.6, pp.567–586, Nov. 2002.

[3] L. Vandenberghe, B.L. De Moor, and J. Vandewalle, “The generalized

linear complementarity problem applied to the complete analysis of

resistive piecewise-linear circuits,” IEEE Trans. Circuits Syst., vol.36,

no.11, pp.1382–1391, Nov. 1989.

[4] B.L. De Moor, Mathematical concepts and techniques for modelling

of staticand dynamicsystems, Ph.D. dissertation, Dep. ofElect. Eng.,

Katholieke Univ., Leuven, Belgium, 1988.

[5] L.O. Chua and P.M. Lin, Computer-Aided Analysis of Electronic Cir-

cuits: Algorithms and Computational Techniques, Prentice-Hall, En-

glewood Cliffs, New Jersey, 1975.