Nitride-based LEDs with p-InGaN capping layer

Abstract

Nitride-based light-emitting diodes (LEDs) with Mg-doped In_0.23Ga_0.77N capping layers were successfully fabricated. Compared to Mg-doped GaN layers, it was found that we could achieve a much larger hole concentration from Mg-doped In_0.23Ga_0.77N layers. It was also found that we could reduce the 20 mA operation voltage from 3.78 to 3.37 V by introducing a 5-nm-thick In_0.23Ga_0.77N layer on top of the p-GaN layer. Furthermore, it was found that output intensity of LEDs with In_0.23Ga_0.77N capping layer was much larger, particularly at elevated temperatures.

Full text

Page 1

IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 50, NO. 12, DECEMBER 20032567
REFERENCES
[1] H. Iwai, S. Ohmi, S. Akama, C. Ohshima, A. Kikuchi, I. Kashiwagi,
J. Taguchi, H. Yamamoto, J. Tonotani, Y. Kim, I. Ueda, A. Kuriyama,
and Y. Yoshihara, “Advanced gate dielectric materials for sub-100 nm
CMOS,” in IEDM Tech. Dig., 2002, pp. 625–628.
[2] N. Yanagiya, S. Matsuda, S. Inaba, M. Takayanagi, I. Mizushima, K.
Ohuchi, K. Takahasi, E. Morifuji, M. Kanda, Y. Matsubara, M. Habu,
M. Nishigoori, K. Honda, H. Tsuno, K. Yasumoto, T. Yamamoto, K.
Hiyama, K. Kokubun, T. Suzuki, J. Yoshikawa, T. Sakurai, T. Ishizuka,
Y. Shoda, M. Moriuchi, M. Kishida, H. Matsumori, H. Harakawa, H.
Oyamatsu, N. Nagashima, S. Yamada, T. Noguchi, H. Okamoto, and M.
Kakumu, “65 nm CMOS technology (CMOS5) with high density em-
beddedmemoriesforbroadbandmicroprocessorapplications,”inIEDM
Tech. Dig., 2002, pp. 57–60.
[3] E. Morifuji, M. Kanda, N. Yanagiya, S. Matsuda, S. Inaba, K. Okano,
K. Takahashi, M. Nishigori, H. Tsuno, T. Yamamoto, K. Hiyama, M.
Takayanagi, H. Oyamatsu, S. Yamada, T. Noguchi, and M. Kakumu,
“High performance 30 nm bulk CMOS for 65 nm technology node
(CMOS5),” in IEDM Tech. Dig., 2002, pp. 655–658.
[4] M. Fujiwara, M. Takayanagi, T. Shimizu, and Y. Toyoshima, “Ex-
tending gate dielectric scaling limit by NO oxynitride: Design and
process issues for sub-100 nm technology,” in IEDM Tech. Dig.,
2000, pp. 227–230.
[5] H.-H. Tseng, Y. Jeon, P. Abramowitz, T.-Y. Luo, L. Hebert, J. J. Lee, J.
Jiang, P. J. Tobin, G. C. F. Yeap, M. Moosa, J. Alvis, S. G. H. Anderson,
N. Cave, T. C. Chua, A. Hegedus, G. Miner, J. Jeon, and A. Sultan,
“Ultrathindecoupledplasmanitridation(DPN)oxynitridegatedielectric
for 80-nm advanced technology,” IEEE Electron Device Lett., vol. 23,
pp. 704–707, Dec. 2002.
[6] Y. Taur and T. H. Ning, Fundamentals of Modern VLSI Devices.
Cambridge, U.K.: Cambridge Univ. Press, 1998.
[7] T. Yamamoto,K.Uejima, andT. Mogami, “Impactof1–2nm gateoxide
for sub-quarter micron dual gate CMOS,” in Proc. SSDM Conf., Tokyo,
Japan, 1999, pp. 114–115.
[8] W. K. Henson, “Investigation of direct tunneling gate oxides fabricated
by rapid thermal processing for metal–oxide–semiconductor field effect
transistor applications,” Ph.D. dissertation, North Carolina State Univ.,
Raleigh, NC, 1998.
[9] M. S. Krishnan, L. Chang, T.-J. King, J. Bokor, and C. Hu, “MOS-
FETs with 9 to 13 Å thick gate oxides,” in IEDM Tech. Dig., 1999, pp.
241–244.
[10] S. Saito, K. Torii, M. Hiratani, and T. Onai, “Quantitative understanding
of mobility degradation due to remote charge scattering,” in Proc. Int.
Workshop Gate Insulator (IWGI), Tokyo, Japan, 2001, pp. 116–119.
[11] M. S. Krishnan, Y. C. Yeo, Q. Lu, T.-J. King, J. Bokor, and C. Hu, “Re-
mote charge scattering in MOSFETs with ultrathin gate dielectrics,” in
IEDM Tech. Dig., 1998, pp. 571–574.
[12] K. Chen and C. Hu, “Performance and
eter CMOS,” IEEE J. Solid-State Circuits, vol. 33, pp. 1586–1589, Oct.
1998.
[13] K. Chen, C. Hu, P. Fang, and A. Gupta, “Experimental confirmation of
anaccurateCMOSgatedelaymodelforgateoxideandvoltagescaling,”
IEEE Electron Device Lett., vol. 18, pp. 275–278, June 1997.
[14] P. A. Kraus, K. Ahmed, T. C. Chua, M. Ershov, H. Karbasi, C. S. Olsen,
F. Nouri, J. Holland, R. Zhao, G. Miner, and A. Lepert, “Low-energy ni-
trogen plasmasfor65-nmnode oxynitride gate dielectrics:Acorrelation
of plasma characteristics and device parameters,” in Symp. VLSI Tech.
Dig., 2003.
[15] D. W. Barlage et al., “Inversion MOS capacitance extraction for high-
leakage dielectrics using a transmission line equivalent circuit,” IEEE
Electron Device Lett., vol. 21, pp. 454–457, Sept. 2000.
[16] S.-H. Lo, D. A. Buchanan, Y. Taur, L.-K. Han, and E. Wu, “Modeling
and characterization of n - and p - polysilicon-gated ultrathin oxides
(21–26 Å),” in Symp. VLSI Tech. Dig., 1997, pp. 149–150.
[17] S. Inaba, T. Shimizu, S. Mori, K. Sekine, K. Saki, H. Suto, H. Fukui, M.
Nagamine, M. Fujiwara, T. Yamamoto, M. Takayanagi, I. Mizushima,
K. Okano, S. Matsuda, H. Oyamatso, Y. Tsunashima, S. Yamada, Y.
Toyoshima, and H. Ishiuchi, “Device performance of sub-50 nm CMOS
with ultrathin plasma nitrided gate dielectrics,” in IEDM Tech. Dig,
2002, pp. 651–654.
scaling in deep submicrom-
[18] M. Takayanagi-Takagi, H. Yoshimura, and Y. Toyoshima, “Increase of
parasitic resistance of pMOSFETs due to nitrogen Atoms incorpora-
tion into silicon substrate by N O–oxynitride gate dielectric process,”
in IEDM Tech. Dig, 1997, pp. 235–238.
[19] W.-K. Shih, R. Rios, P. Packan, K. Mistry, and T. Abbott, “A general
partition scheme forgate leakagecurrent suitablefor MOSFETcompact
models,” in IEDM Tech. Dig., 2001, pp. 293–296.
Nitride-Based LEDs With p-InGaN Capping Layer
S. J. Chang, C. H. Chen, P. C. Chang, Y. K. Su, P. C. Chen, Y. D. Jhou,
H. Hung, S. M. Wang, and B. R. Huang
Abstract—Nitride-based light-emitting diodes (LEDs) with Mg-doped
GaN capping layers were successfully fabricated. Compared
to Mg-doped GaN layers, it was found that we could achieve a much
larger hole concentration from Mg-doped In
also found that we could reduce the 20 mA operation voltage from 3.78
to 3.37 V by introducing a 5-nm-thick In
p-GaN layer. Furthermore, it was found that output intensity of LEDs with
In
GaN capping layer was much larger, particularly at elevated
temperatures.
In
GaN layers. It was
GaN layer on top of the
Index Terms—Capping layer, electroluminescence (EL) intensity, hole
concentration, InGaN, light-emitting diodes (LED), operation voltage.
I. INTRODUCTION
Recently, tremendous progress has been achieved in GaN-based
light-emitting diodes (LEDs). This has resulted in a variety of
applications such as traffic light, full color display and lighting. In
order to achieve high-performance nitride-based LEDs, it is required
to reduce p-GaN contact resistance. Conventional nitride-based LEDs
use an Mg-doped GaN as the p-contact layer [1]–[3]. However,
the operation voltage of such LEDs is still high due to the low Mg
ionization percentage. The low Mg ionization percentage will result
in a highly resistive top p-GaN layer and a large metal/p-GaN contact
resistance. Recent investigations have indicated that Mg-doped
AlGaN/GaN strained layer superlattice (SLS) can be used to increase
the Mg ionization percentage [4]–[6]. Nitride-based LEDs with a
low operation voltage were also demonstrated by using such an
Al?Ga???N/GaN SLS p-contact layer [7]–[9]. It is also possible to
use n?-InGaN/GaN short period superlattice (SPS) to reduce the
contact resistance of nitride-based LEDs [10]. By growing such SPS
structure on top of the p-GaN layer, one could achieve a good “ohmic”
contact through tunneling when the n?(InGaN/GaN)-p(GaN) junction
was properly reverse biased. Although these two methods could both
Manuscript received July 28, 2003; revised September 29, 2003. This work
was supported by the National Science Council of Taiwan, R.O.C., under Grant
NSC 91-2218-E-230-006. The review of this brief was arranged by Editor M.
Anwar.
S. J. Chang, Y. K. Su, P. C. Chang, P. C. Chen, Y. D. Jhou, and H. Hung are
with the Institute of Microelectronics and the Department of Electrical Engi-
neering, National Cheng Kung University, Tainan 701, Taiwan, R.O.C. (e-mail:
changsj@mail.ncku.edu.tw; yksu@mail.ncku.edu.tw).
C. H. Chen is with the Department of Electronic Engineering, Cheng Shiu
University, Kaohsiung 830, Taiwan, R.O.C. (e-mail: chchen@csu.edu.tw).
S. M. Wang and B. R. Huang are with the Institute of Electronics and In-
formation Engineering and the Department of Electronic Engineering, National
Yunlin University of Science and Technology, Touliu, 640, Taiwan R.O.C.
Digital Object Identifier 10.1109/TED.2003.820131
0018-9383/03$17.00 © 2003 IEEE
Authorized licensed use limited to: IEEE Xplore. Downloaded on February 8, 2009 at 19:49 from IEEE Xplore. Restrictions apply.

Page 2

2568IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 50, NO. 12, DECEMBER 2003
Fig. 1.
InGaN capping layer.
Schematic structure of the InGaN/GaN MQW LEDs with Mg-doped
reduce the operation voltages of nitride-based LEDs effectively, both
methods require complex growth procedures. The other method to
reduce p-contact resistance is to use p-InGaN as the capping layer
[11]–[14]. It has been shown clearly that one could achieve good
ohmic p-contacts by depositing a p-InGaN layer on top of the p-GaN.
Since the bandgap energy of InGaN is smaller than that of GaN, we
should be able to achieve higher hole concentrations and thus better
p-ohmic contacts. On the other hand, strain-induced piezoelectric
filed at p-InGaN/p-GaN interface could result in a significant amount
of energy band bending. Such a band bending could also result in
higher hole concentration and a smaller p-contact resistance [11], [12].
Although these advantages have all been demonstrated, no reports
on the fabrication of nitride-based LEDs with p-InGaN capping
layer could be found in the literature to our knowledge. In this study,
nitride-based LEDs with and without the p-InGaN capping layer were
both prepared. The optical and electrical properties of the fabricated
LEDs will be reported.
II. EXPERIMENT
Samples used in this study were all grown on (0001)-oriented sap-
phire substrates by low-pressure metalorganic chemical vapor depo-
sition (LP-MOCVD) [15]–[18]. The gallium, aluminum, indium, and
nitrogen sources were trimethylgallium (TMGa), trimethylaluminum
(TMAl),trimethylindium(TMI)andammonia(NH?),respectively.Bi-
cyclopentadienylmagnesium (Cp?Mg)and disilane(Si?H?) wereused
as the p-type and n-type doping sources, respectively. We first pre-
paredMg-dopedIn?Ga???NlayersdirectlyonundopedGaNfollowed
by a 750?C thermal annealing in N? ambient. The growth tempera-
ture was controlled to vary the indium mole fraction in In?Ga???N.
The thickness of each Mg-doped In?Ga???N film was controlled at
50 nm, which prevent the In?Ga???N layers from being cracking. The
indium mole fractions of In ?Ga???N films were calculated by the
difference, in x-ray rocking curve (XRD), of the peak position be-
tween In?Ga???N and GaN. These calculated values of the indium
fraction in this study were ranged from 0 to 0.23. Hall measurement
was then used to measure hole concentrations and mobilities of the
In?Ga???N layers using the van der Pauw method with Ni/Au ohmic
contact. Nitride-based LEDs were also prepared. The LED structure
consists a 25-nm-thick low temperature GaN nucleation layer, a 1-?
m-thick undoped GaN and a 2-?m-thick Si-doped GaN, a 5-period
Si-doped InGaN/GaN multiple-quantum-well (MQW) active region, a
0.1-?m-thick Mg-doped Al???Ga???N cladding layer, a 0.3-?m-thick
Mg-doped GaN layer and an Mg-doped InGaN capping layer with dif-
ferent indium contents and different thickness. The growth rate was
kept at 2-?m/h throughout the growth. Each InGaN/GaN pair in the
Fig. 2.
the indium content in In Ga
was 50 nm.
Room temperature hole concentrations and mobilities as functions of
N layers. The thickness of In GaN layers
MQW active region consists a 2.5-nm-thick In????Ga????N well layer
and a 12-nm-thick GaN barrier layer. The surfaces of the samples were
then partially etched until the n-type GaN layers were exposed. Ni/Au
was subsequently evaporated onto the p-type InGaN surfaces to serve
as the p-electrode. On the other hand, Ti/Al was deposited onto the ex-
posed n-type GaN layers to serve as the n-type electrode. Fig. 1 shows
theschematicstructureoftheInGaN/GaNMQWLEDswithMg-doped
InGaN capping layer. For comparison, conventional LED structures
without the use of Mg-doped InGaN capping layer were also prepared.
Thecurrent–voltage(I–V)characteristicsofthefabricateddeviceswere
then measured at room temperature by an HP4156 semiconductor pa-
rameter analyzer. The integrated electroluminescence (EL) intensity of
the LEDs were measured by injecting a different amount of dc current
into these devices. Then these LEDs were packaged onto the TO can to
form the so-called molded LEDs. The output power can be measured
usingtheintegratedspheredetector,sensorsandspetrumcards.Finally,
the efficiency was also analyzed using the same equipment.
III. RESULTS AND DISCUSSION
Fig. 2 shows room temperature hole concentrations and mobilities
of the In?Ga???N layers at room temperature. It was found that the
measured hole concentration increased exponentially as the indium
content was increased. It was also found that we could achieve a high
???? ? ????cm??hole concentration from the Mg-doped InGaN
with an indium content of 0.23. Such a value suggests that we should
be able to achieve good ohmic contacts from nitride-based LEDs
with a p-In????Ga????N capping layer. Furthermore, it was found
that carrier mobility decreased as the indium content was increased.
Such a decrease in carrier mobility could be partially attributed to the
increased impurity scattering of charged ions and partially attributed
to the increased alloy scattering. Fig. 3 shows I–V characteristics
of the fabricated LEDs. It could be seen clearly that the operation
voltage was higher for the conventional LED, as compared to LEDs
with Mg-doped In????Ga????N capping layer. Under a 20 mA current
injection, it was found that the operation voltage was 3.78 V for
the conventional LED (i.e., LEDI). On the other hand, the 20-mA
operation voltages were 3.37, 3.50 and 3.72 V for the LEDs with
5-nm-thick p-In????Ga????N capping layer (i.e., LEDII), 10-nm-thick
p-In????Ga????N capping layer (i.e., LEDIII) and 20-nm-thick
p-In????Ga????N capping layer (i.e., LEDIV), respectively. Compared
with conventional LED, the smaller operation voltages observed from
the three LEDs with In????Ga????N capping layer could be attributed
to the smaller p-contact resistance. It was also found that we could
achieve the lowest operation voltage from the LED with 5-nm-thick
Authorized licensed use limited to: IEEE Xplore. Downloaded on February 8, 2009 at 19:49 from IEEE Xplore. Restrictions apply.

Page 3

IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 50, NO. 12, DECEMBER 20032569
Fig. 3.
I–V characteristics of the fabricated LEDs.
Fig. 4. Room temperature EL spectra of LEDI and LEDII.
p-In????Ga????N capping layer (i.e., LEDII). This could be understood
by the fact that the In????Ga????N capping layer might relax as its
thickness increases. As a result, the p-contact resistance and operation
voltage will both become larger. Fig. 4 shows room temperature EL
spectra of LEDI and LEDII. It could be seen that although the EL peak
position and full width half maximum (FWHM) were about the same
for these two samples, the integrated EL intensity of LEDII was about
65% larger than that of LEDI. Such a significant enhancement in EL
intensity could again be attributed to the reduced p-contact resistance.
It is also possible that the much larger hole concentration could
enhance the current spreading effect and thus results in a larger EL
intensity. The much larger EL intensity observed from LEDII indicates
that we could indeed improve the performance of nitride-based LEDs
by using the p-InGaN capping layer.
Fig. 5 shows the intensity–current (L–I) characteristics of LEDI and
LEDII. It can be seen that the EL intensity of LEDII was much larger
than that of LEDI. With a 20 mA current injection, it was found that
the output power of LEDI was 2.02 mW. In contrast, the output power
could reach 3.29 mW for LEDII. Such a significant increase in output
power can again be attributed to smaller p-contact resistance and better
current spreading of LEDII. It was also found that the output power
of LEDI starts to decrease when the injection current was larger than
80 mA. On the other hand, output power degradation was much less
significant for LEDII. Since the operation voltage was much higher for
LEDI, a large amount of heat should be generated at the metal/p-GaN
interface. As a result, the output intensity degradation will occur at an
Fig. 5.
L–I characteristics of LEDI and LEDII.
Fig. 6.Output powers of LEDI and LEDII measured at various temperatures.
earlier stage, as compared to LEDII with 5-nm-thick p-In????Ga????N
capping layer. Such a thermal effect will also have a significant im-
pact on the reliability of the LEDs. Fig. 6 shows 30 and 50 mA output
powers measured at different temperatures for LEDI and LEDII. It can
be seen that the output powers decrease as the temperature increases
in all four cases. With a 30 mA current injection, it was found that
the output power decreased by 6.4 and 4.3% for LEDI and LEDII, re-
spectively, as the temperature was increased from 25?C to 80?C. On
the other hand, the 50 mA output power decreased by 9.1 and 6.1%,
for LEDI and LEDII, respectively, as the temperature was increased
from 25?C to 80?C. The smaller decrease in output power observed
in LEDII is again due to its improved I–V characteristics. Thus, LED
with 5-nm-thick p-In ????Ga????N capping layer will have a smaller
heating effect especially under high current injection and elevated tem-
peratures. As a result, the output power degradation of LEDII is less
significant, as can be seen from Fig. 6.
IV. CONCLUSION
In conclusion, nitride-based LEDs with Mg-doped In????Ga????N
capping layers were successfully fabricated. Compared to Mg-doped
GaN layers, it was found that we could achieve a much larger hole
concentration from Mg-doped In????Ga????N layers. It was also found
that we could reduce the 20 mA operation voltage from 3.78 to 3.37 V
by introducing a 5-nm-thick In????Ga????N layer on top of the p-GaN
layer. Furthermore, it was found that output intensity of LEDs with
In????Ga????N capping layer was much larger, particularly at elevated
temperatures.
Authorized licensed use limited to: IEEE Xplore. Downloaded on February 8, 2009 at 19:49 from IEEE Xplore. Restrictions apply.

Page 4

2570IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 50, NO. 12, DECEMBER 2003
REFERENCES
[1] J. K. Ho, C. S. Jong, C. C. Chiu, C. N. Huang, K. K. Shih, L. C. Chen,
F. R. Chen, and J. J. Kai, “Low-resistance ohmic contacts to p-type GaN
achieved by the oxidation of Ni/Au films,” J. Appl. Phys., vol. 86, pp.
4491–4497, Oct. 1999.
[2] L. W. Wu, S. J. Chang, T. C. Wen, Y. K. Su, W. C. Lai, C. H. Kuo, C. H.
Chen, and J. K. Sheu, “Influence of Si-doping on the characteristics of
InGaN/GaN multiple quantum well blue light emitting diodes,” IEEE J.
Quantum. Electron., vol. 38, pp. 446–450, May 2002.
[3] Y.L.Li, E.F. Schubert, J.W.Graff,A.Osinsky,andW.F.Schaff,“Low-
resistance ohmic contacts to p-type GaN,” Appl. Phys. Lett., vol. 76, no.
19, pp. 2728–2730, May 2000.
[4] P. Kozodoy, M. Hansen, S. P. DenBaars, and U. K. Mishra, “Enhanced
Mg doping efficiency in Al
Ga
Lett., vol. 74, no. 24, pp. 3678–3680, 1999.
[5] I.D. Goepfert,E. F. Schubert,A. Osinsky,P. E.Norris,andN. N.Faleev,
“Experimental and theoretical study of acceptor activation and transport
propertiesinp-typeAl Ga
N/GaNsuperlattices,”J.Appl.Phys.,vol.
88, no. 4, pp. 2030–2038, 2000.
[6] K.KumakuraandN.Kobayashi,“IncreasedelectricalactivityofMg-ac-
ceptors in Al Ga
N/GaN superlattices,” Jpn. J. Appl. Phys., vol. 38,
no. 9A/B, pp. L1012–L1014, Nov. 1999.
[7] J. K. Sheu, G. C. Chi, and M. J. Jou, “Low-operation voltage of InGaN/
GaN light-emitting diodes by using a Mg-doped Al
superlattice,” IEEE Electron Device Lett., vol. 22, pp. 160–162, Apr.
2001.
[8] A. Kinoshita, H. Hirayama, M. Ainoya, Y. Aoyagi, and A. Hirata,
“Room-temperatureoperation
Al
GaN quantum-well light-emitting diodes with Mg-doped
superlattice layers,” Appl. Phys. Lett., vol. 77, pp. 175–177, 2000.
[9] S. Nakamura, M. Senoh, S. Nagahama, N. Iwasa, T. Matsushita, and T.
Mukai,“Blue InGaN-basedlaser diodeswith an emission wavelength of
450 nm,” Appl. Phys. Lett., vol. 76, pp. 24–22, 1999.
[10] J. K. Sheu, J. M. Tsai, S. C. Shei, W. C. Lai, T. C. Wen, C. H. Kou, Y. K.
Su, S. J. Chang, and G. C. Chi, “Low-operation voltage of InGaN/GaN
light-emitting diodes with Si-doped In
perlattice tunneling contact layer,” IEEE Electron Device Lett., vol. 22,
pp. 460–462, Oct. 2001.
[11] T. Gessmann, Y. L. Li, E. L. Waldron, J. W. Graff, E. F. Scuubert, and J.
K.Sheu,“Ohmiccontactsto p-typeGaNmediatedbypolarizationfields
in thin In Ga
N capping layers,” Appl. Phys. Lett., vol. 80, no. 6, pp.
986–988, Feb. 2002.
[12] S. Yamasaki, S. Asami, N. Shibata, M. Koike, K. Manabe, T.
Tanaka, H. Amano, and I. Akasaki, “P-type conduction in Mg-doped
Ga
InN grown by metalorganic vapor-phase epitaxy,” Appl.
Phys. Lett., vol. 66, no. 9, pp. 1112–1114, Feb. 1995.
[13] K. Kumakura, T. Makimoto, and N. Kobayashi, “Efficient hole
geneation above 10
cmin Mg-doped InGaN/GaN superlattices
at room temperature,” Jpn. J. Appl. Phys., vol. 39, no. 3A/B, pp.
L195–L196, Mar. 2000.
[14]
, “Activation energy and electrical activity of Mg-doped
In GaN ??? ??,” Jpn. J. Appl. Phys., vol. 39, no. 4B, pp.
L337–L339, Apr. 2000.
[15] C. H. Chen, S. J. Chang, Y. K. Su, G. C. Chi, J. K. Sheu, and J. F.
Chen, “High efficient InGaN/GaN MQW green light emitting diodes
with CART and DBR structures,” IEEE J. Selected Topics Quantum
Electron., vol. 8, pp. 284–288, Mar./Apr. 2002.
[16] C. H. Chen, Y. K. Su, S. J. Chang, G. C. Chi, J. K. Sheu, J. F. Chen,
C. H. Liu, and U. H. Liaw, “High brightness green light emitting diode
with charge asymmetric resonance tunneling structure,” IEEE Electron
Device Lett., vol. 23, pp. 130–132, Mar. 2002.
[17] C.H.Chen,S.J.Chang,Y.K.Su, G.C.Chi,J.Y.Chi,C.A.Chang,J.K.
Sheu, and J. F. Chen, “GaN metal-semiconductor-metal ultraviolet pho-
todetectors with transparent indium-tin-oxide Schottky contacts,” IEEE
Photon. Technol. Lett., vol. 13, pp. 848–850, Aug. 2001.
[18] C. H. Chen, S. J. Chang, Y. K. Su, G. C. Chi, J. K. Sheu, and I. C. Lin,
“Verticalhighqualitymirror-likefacetofGaN-baseddevicesbyreactive
ion etching,” Jpn. J. Appl. Phys., vol. 40, no. 4B, pp. 2762–2764, Apr.
2001.
N/GaN superlattices,” Appl. Phys.
GaN/GaN
at333nmofAl
Ga N/
Ga N/GaN short-period su-
Current-Mode CMOS Image Sensor
Using Lateral Bipolar Phototransistors
Ying Huang and Richard I. Hornsey
Abstract—A current-mode image sensor has been designed using
current mirrors with amplifying device ratios. Prototype sensors have
been fabricated in a standard 0.18- m CMOS technology. Image capture
is demonstrated from two 70
48 pixel arrays, using photodiodes and
lateral bipolar phototransistors as the photodetectors. The latter type
displays a reduced fixed pattern noise, while linearity is similar to that of
the photodiode pixel. The lateral bipolar phototransistor pixels also show
a greater response in the red region of the visible spectrum.
Index Terms—Active pixel sensors, CMOS image sensors, current-mode,
lateral bipolar phototransistors (LPT).
I. INTRODUCTION
Today, advances and improvements continue to be made in the
growing digital imaging world. The two main silicon-based image
sensor technologies are charge-coupled devices (CCDs), which
dominated until the mid-1990s, and CMOS image sensors (CISs).
The development of CIS is primarily motivated by the demand for
an alternative imaging technology offering low cost, low power, high
level of system integration, and increased functionality [1].
On the other hand, standard CMOS technologies are not tailored
for light sensing; as fabrication technology scales down, fabrication
process modifications and innovative pixel architecture are often
required for good CMOS imaging quality [2]. The majority of the
reported image sensors is implemented in voltage-mode [1], [3]–[6],
however, along with technology scaling, the power supply voltage
also scales down, reducing the full signal swing of a CMOS imager.
In addition the pn-junction photodiode, commonly used in CISs, is the
simplest photodetecting device and is easily integrated in a standard
digital CMOS process. Photodiode-based image sensors, however,
suffer from low responsivity.
A current-mode image sensor has several potential advantages, in-
cluding increased dynamic range for a limited supply voltage, smaller
real estate, higher operation speed, and broad design techniques al-
lowing easy implementations of various image processing operations.
The photocurrent of an ordinary photodiode is typically small, in the
picoamperes range, so commonly in active pixel sensors (APSs), the
signal is accumulated through charge integration. The current-mode
APSs reported so far include a charge modulation device image sensor
[7] and a CMOS APS [8]. Because the operation of these image sen-
sorsgenerallyinvolveasequenceofreset,signalintegration,andsignal
readout, they cannot be used in analog parallel collective processing
schemes that are continuous in time.
In this brief a current-mode CMOS active pixel sensor using cur-
rent mirrors with amplifying device ratios for the current readout is
reported.BecausephotocurrentsfromconventionalCMOS-compatible
Manuscript received August 27, 2003. This work was supported in part by
BetacomCorporationInc.,CanadianMicroelectronicsCorporation,andNatural
Sciences and the Engineering Council of Canada. The review of this brief was
arranged by Editor J. Hynecek.
Y. Huang is with Rockwell Semiconductor, Thousand Oaks, CA 91358 USA
(e-mail: yhuang@alumni.uwaterloo.ca).
R.I.HornseyiswithYorkUniversity,Toronto,ON,M3J1P3Canada(e-mail:
hornsey@cs.yorku.ca).
Digital Object Identifier 10.1109/TED.2003.820123
0018-9383/03$17.00 © 2003 IEEE
Authorized licensed use limited to: IEEE Xplore. Downloaded on February 8, 2009 at 19:49 from IEEE Xplore. Restrictions apply.