Single Byte Error Correcting—Double Byte Error Detecting Codes for Memory Systems
ABSTRACT In a memory that uses byte-organized memory chips, each containing b (≥2) output bits, a single chip failure is likely to affect many bits within a byte. Single byte error correcting–double byte error detecting codes (SbEC–DbED codes) are used in this kind of memory system to increase reliability.
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ABSTRACT: The class of codes described in this paper is used for single-error correction and double-error detection (SEC-DED). It is equivalent to the Hamming SEC-DED code in the sense that for a specified number k of data bits, the same number of check bits r is used. The minimum odd-weight-column code is suitable for applications to computer memories or parallel systems. A computation indicates that this code is better in performance, cost and reliability than are conventional Hamming SEC-DED codes.Ibm Journal of Research and Development 08/1970; · 0.69 Impact Factor
Article: b-Adjacent Error Correction[show abstract] [hide abstract]
ABSTRACT: A high-speed method is derived for single-symbol error correcting Reed-Solomon and Hamming type codes. A matrix description is used for implementation of the codes, in which single-error correction in the Galois field 2<sup>b</sup> corresponds to correcting a block of b bits in a binary field. The resulting codes correct not only single-bit errors but also single clusters of b-adjacent-bit errors.Ibm Journal of Research and Development 08/1970; · 0.69 Impact Factor