- Citations (9)
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Article: Efficient digital single-bit resonator
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ABSTRACT: An all-digital single-bit resonator is presented. The resonator input can be either a single-bit or multi-bit signal and the resonator output is in single-bit format. This resonator structure contains no multi-bit multiplication operations, making the resonator efficient for implementation. -
Article: A 14-bit 80-kHz sigma-delta A/D converter: modeling, design and performance evaluation
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ABSTRACT: The development is described of a sigma-delta A/D (analog-to-digital) converter. Included is a brief overview of sigma-delta conversion. The A/D converter achieves an 88.5-dB dynamic range and a maximum signal-to-noise ratio of 81.5 dB. The harmonic distortion is negligible. This level of performance is about 10 dB higher than previously reported results for oversampled A/D converters in this frequency range. The analog modulator uses a double-integration switched-capacitor architecture with an oversampling rate of 10.24 MHz. Transconductance amplifiers having a 160-MHz f <sub>t</sub> were developed for the integrators. The circuit is implemented in a 1.75-μm 5-V CMOS process. The analog circuitry occupies 2 mm<sup>2 </sup> of silicon area and consumes 75 mW of power. Some of the difficult problems associated with evaluating the performance of sigma-delta converters are described. The design of a sigma-delta development and performance evaluation system is presented. This system includes a custom interface board linking the chip to a Sun workstation, and extensive digital signal processing and analysis softwareIEEE Journal of Solid-State Circuits 05/1989; · 3.23 Impact Factor -
Article: Sigma-delta modulator with spectrally shaped feedback
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ABSTRACT: This paper explores the use of finite-impulse response (FIR) filters in the feedback path of a low-pass sigma-delta modulator in order to combat some nonideal effects encountered in an analog implementation. In this approach, the filter corresponding to the first integrator is a lowpass filter which smoothes out the feedback waveform by attenuating the high-frequency quantization noise. This lowpass filtering decreases the power consumption of a switched-capacitor implementation and alternatively reduces the sensitivity to clock jitter in a continuous-time structure. A design methodology ensuring the stability of the system is presented. Theoretical analysis and simulations show that the FIR filters allow a continuous-time single-bit modulator to achieve the jitter performance of a comparable multibit modulator.IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing 10/2003;
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Keywords
>DZ modulators
broadband signal applications
comb filter possesses
design technique
hardware implementation
proposed design technique
proposed filter response
signal-to-quantization-noise ratio
single-bit digital comb ifiter
single-bit N-period digital resonator