Defect Printability Comparing Actinic Printing with Advanced
Simulation for EUV masks
Il-Yong Jang*a, Ranganath Tekia, Vibhu Jindala, Frank Goodwina
Masaki Satakeb, Ying Lib, Danping Pengb
Sungmin Huhc, Seong-Sue Kimc
a SEMATECH, 257 Fuller Road Suite 2200 Albany, NY 12203 USA
b Luminescent Technologies, Inc., 2300 Geng Road, Suite 250, Palo Alto, CA 943032
c Semiconductor R&D Center, Samsung Electronics Co., LTD., San#16 Banwol-Dong,
Hwasung-City, Gyeonggi-Do, 445-701 Korea
We describe the printability of native phase defects categorized by type and dimension using NXE3100 EUV scanner
and DPS (Defect Printability Simulator) software developed by Luminescent Technologies. The critical dimension (CD)
error on wafers simulated by the DPS is strongly affected by the geometry of the multilayer (ML) used as an input
parameter for simulation. This finding is supported by cross section images of the ML acquired from transmission
electron microscopy (TEM) showing that the diameter of the defect and geometry of the ML are closely related.
Accordingly, the selection of the type of ML geometry seems to be important in the accuracy of defect printability
simulation. The CD error simulated from the DPS using reconstructed ML geometry shows better correspondence with
that measured on a wafer than conformal or smoothed ML geometry. The DPS software shows good simulation
performance in predicting defect printability at 27nm HP node. This is verified by wafer printing and RCWA simulation.
Keywords: EUV mask, defect printability, phase defect, printability simulation, multilayer growth model
As extreme ultraviolet (EUV) lithography technology has matured, patterning quality using current EUV exposure tools
is improving. However challenges in the mask defect and review infrastructure may slow the introduction of EUV
lithography to mass production. While the number of phase defects on EUV mask blanks has been decreasing noticeably
through the efforts of mask blank suppliers, the defect levels of EUV mask blanks require further improvement.
SEMATECH has studied EUV defect printability using programmed pit and bump defects imaged by the actinic
inspection tool (AIT) at Berkeley and has shown how the critical spherical equivalent volume diameter (SEVD) of the
defect affects printability under different exposure conditions . However, because these studies used programmed
defects on EUV blanks, they could not predict most cases of defect printability in EUV high volume manufacturing
(HVM) since HVM masks are affected by native phase defects under the absorber pattern. Recent study showed that
blank defects which are 23nm in SEVD could be detected by the most advanced optical inspection tool and the defects
start to be printed at 22nm HP node , however it is not easy to predict the real defect printability using SEVD alone,
because native defects have various sizes and shapes even though they have the same SEVD. Furthermore it is very
difficult to estimate the defect printability of native defects using only simulation software because geometry of the ML
strongly depends on the defect diameter. ML geometry should be selected carefully to assure simulation accuracy.
Therefore we must know how phase defect size increases as ML stacks are added. Although real ML geometry would
provide the most accurate information about which geometry should be used for simulation, it is cost-prohibitive to break
a production mask just to get the cross section image. Therefore it is necessary to have quantified data indicating which
one is the best ML geometry to use as a simulation input parameter for various phase defect diameters. Accordingly,
SEMATECH had started a new project to investigate the printability of native phase defects on pattern masks using
state-of-the-art commercial mask manufacturing tools, SEMATECH’s own failure analysis (FA) tools and DPS software.
Based on the defect libraries created during last two years  and actinic printing results obtained from NXE3100
exposure, the results of native defect printability and its relationship with ML geometry will be presented in this paper.
*firstname.lastname@example.org; phone +1-518-649-1119; fax +1-518-649-1344
Extreme Ultraviolet (EUV) Lithography IV, edited by Patrick P. Naulleau, Proc. of SPIE Vol. 8679, 86790H
© 2013 SPIE · CCC code: 0277-786X/13/$18 · doi: 10.1117/12.2011493
Proc. of SPIE Vol. 8679 86790H-1
Q3 Defect Analysis
LAIPHIM EUV Defect Printability Simulator
2. EXPERIMENTAL PROCEDURE
A low thermal expansion material (LTEM) substrate having numerous native phase defects (pit and bump) was prepared
and inspected on a Teron6XX set to blank inspection mode at KLA-Tencor. Among the 2400 defects detected in the
inspection tool, 300 defects of interest to this study were selected. Punch marks were made around those defects for
AFM analysis to measure the diameter and height or depth of the defect. ML and a Ru capping layer were deposited over
the substrate in SEMATECH’s ion beam deposition (IBD) chamber and eventually covered the native phase defect on
the LTEM substrate. The same procedure of inspection and AFM measurement was also done on the ML surface after
ML deposition. Both AFM data measured from the substrate and the ML surface were compared with each other to
define ML geometry. For the absorber layer, a new deposition process for TaN was developed by SEMATECH using the
IBD chamber. The refractive index and absorption coefficient of SEMATECH’s absorber measured at the center for x-
ray optics (CXRO) in Lawrence Berkeley National Lab (LBNL) is n=0.947 and k=0.0304 respectively. 56 nm of
deposited TaN and 3 nm of self-grown native oxide made the total absorber thickness 59 nm. For absorber patterning, a
state-of-the-art E-beam mask writer and EUV mask etcher were used to obtain a high quality absorber pattern having
excellent LWR and absorber sidewall angle. The final mean-to-target of the mask was 1.9 nm. The AFM data measured
on the substrate and surface of the ML provides the information about the ML geometry which is applicable to each
defect. Accordingly the optimal ML geometry for each defect is used to generate the most accurate simulation results.
CD error was simulated for the defects of interest using three kinds of ML geometry. These geometries were compared
with the CD error measured on the wafer after NXE3100 exposure. Here, the CD error is defined as the percentage of
CD shrinkage occurred by phase defect with respect to the nominal CD. Figure.1 shows the experimental procedure for
Figure 1. The procedure for defect printability study in SEMATECH
Proc. of SPIE Vol. 8679 86790H-2
CD error =
Conventional illumination at 0.25NA conditions were used for simulation and exposure on the NXE3100. Bump and pit
defects having 3 nm of height or depth on the substrate were selected out of the 300 defects measured by AFM. Defects
located nearly at the center of absorber pattern were chosen due to the difficulty in finding defects that satisfied all of the
requirements for dimension, height and position. Three kinds of ML geometry, conformal ML, smoothed ML and
reconstructed ML, were used for DPS. The results of the DPS were verified by RCWA simulation which is widely used
for optical simulation. In this study, the CD of clear pattern on the wafer caused by phase defect was compared with the
CD from a nominal pattern. The percentage of CD shrinkage was defined as CD error which is used to represent defect
printability. Table 1 shows the simulation conditions used in detail. Figure 2 shows the simulation procedure and Table 1
details the simulation conditions.
Figure 2. The procedure of simulation for defect printability study
Table 1. Simulation conditions in the DPS software
3. RESULTS AND DISCUSSION
3.1 Multilayer (ML) growth model
The importance of simulation in predicting defect printability cannot be overestimated. Since the aerial image analysis
tool is not on the market yet, defect printability studies are likely to be heavily dependent on simulation instead of using
an actinic printing tool. Therefore, verified simulation parameters are required to improve simulation accuracy .
Among simulation parameters, the geometry of ML on the phase defect is most critical because it is difficult to predict
exactly how the substrate defect changes as the ML grows to 40 pairs stacks. To study the relationship of ML geometry
with respect to each defect, several TEM images of phase defects were analyzed. The TEM images show that the
Height on substrate
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24 25 2729
3133 38 45 56
geometry of the ML strongly depends on the defect dimension measured on the substrate. We compared the defect
diameters with each other instead of using the spherical equivalent volume diameter (SEVD) because our previous study
reported that the SEVD does not correlate well with printability results . Accordingly, we selected defects having 3
nm height or depth out of the 300 defects of interest because it was necessary to remove the effect of depth (height) on
the change of ML geometry. Figure 3 shows how to define the dimension of defect on substrate and ML surface (a) and a
TEM image showing that the pit defect at 35 nm in diameter on substrate (b) becomes larger as the ML grows to 40 pairs
and eventually becomes 52nm. However the pit defect measured as 75nm on the substrate (c) does not become larger but
seems to maintain the substrate diameter through the 40 pairs of ML deposition.
To investigate further the relationship between defect dimension measured on the substrate and on the ML top, we
compared AFM data measured from the substrate with that from the ML surface and produced a correlation graph as
shown in Figure 4. For the bump defect shown in Figure 4(a), the normalized dimension of the defect gradually
decreases as the surface defect dimension increases and finally reaches between 0.9 and 1.0 normalized dimension over
70 nm of surface dimension, indicating that the dimension measured on ML surface is near the dimension measured on
the substrate for a large defect. For a pit defect, while each point of the normalized dimension seems to be slightly
deviated from the fitted curve, a similar trend as the bump defect can be observed.
(a) (b) (c)
Figure 3. ML geometry and TEM images; (a) The dimension of the defect on the substrate and on the ML surface are
measured, (b) smoothing ML geometry showing 35 nm substrate defect grown to 52 nm, (c) conformal ML geometry
showing 75nm substrate defect does not become larger on the ML surface.
Figure 4. Normalized dimension as a function of substrate dimension; as the substrate dimension increases, the
normalized dimension decreases for (a) bump defect and (b) pit defect
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(a) (b) (c) (d) (e)
(f) (g) (h) (i) (j)
Figure 5. Reconstructed ML geometry based on the dimension of substrate and surface
(a) 24.2 42 1.72 (f) 24.4 43.2 1.86
(b) 30.6 47.7 2.1 (g) 29.8 49.5 2.4
(c) 35.9 47.5 2.28 (h) 36.3 46.8 2.7
(d) 41.9 44.9 2.8 (i) 42.1 50.4 2.85
47.9 48 3.1
Table 2. Dimension and depth or height of each defect
Since the phase defects analyzed in this study are from native defects rather than programmed defects, it was impossible
to compare the printability of a pit defect of exactly the same size as the bump defect. However, since the mask used for
this study had numerous defects, we could select defects satisfying the purpose of this study. Figure 5 is ML geometry
modified from conformal ML structure with the defect dimension measured on the substrate and on the surface for bump
and pit defects. Table 2 is the dimension and height or depth of each defect used in the simulation.
3.2 Defect printability on 27 nm HP node
Defect printability was studied using EUV printing results and simulation results. To study the defect printability in 27
nm HP L&S pattern, a focus exposure matrix (FEM) wafer was exposed in the EUV scanner at 1.5mJ/cm2 dose and 50
nm focus. The FEM wafer was developed with the resist processes optimized for 27 nm HP L&S. After wafer exposure,
Proc. of SPIE Vol. 8679 86790H-5
Substrate dimension(nm)Substrate dimension(nm)
the wafer CD error caused by the mask phase defect was investigated at 24 nm, 30 nm, 36 nm, 42 nm and 48 nm pit and
bump defects. This CD error was compared with the CD error obtained from simulation using different ML geometry as
input parameters as shown in Figure 6. For the bump defects as shown in figure 6(a), the CD error caused by 24 nm
defect is 7.6% on wafer printing which is close to the value that not only the reconstructed geometry but conformal
geometry predicted. However, for larger defect dimensions, there is a difference in CD error between wafer and
simulation. Defects having 36 nm, 42 nm and 48nm dimension give rise to a 3.5%, 3.6% and 3.5% CD error difference
respectively for the conformal ML geometry. Pit defects also show 8.8% and 8.5% of CD error difference for 30 nm and
36 nm defect dimension for conformal ML geometry as shown in figure 6(b). However the CD error difference between
simulation and wafer printing seems to decrease once the reconstructed ML geometry was used. The CD error difference
becomes larger as the defect dimension increases. This shows that to maintain simulation accuracy, the selection of ML
geometry is critical as defect dimension increases.
Figure 6. Defect printability on 27nmHP of L&S pattern with defect dimension; (a) bump defect, (b) pit defect
For both bump and pit defects, the CD error predicted by simulation using reconstructed ML geometry, which is
modified by each defect’sdimension, is very close to that measured on the wafer. The CD error difference between wafer
printing and simulation using reconstructed ML geometry is below 4% through all dimensions for bump defects as
shown in figure 6(a) and is below 3% for pit defects as shown in figure 6(b). Therefore, it is clear that the reconstructed
ML geometry could give better simulation accuracy than conformal ML geometry. However it is assumed that the
dependence of ML geometry on substrate dimension would differ with changes in the ML deposition conditions. Several
papers show that the film growth model is strongly dependent on the deposition condition and tool schematics , .
Therefore it would be better to have a library containing information on the relationship between the defect dimension on
the substrate and ML geometry for the each supplier’s ML.
From this study, we can also determine that 24 nm bump defects which show 7.6% CD error may be near the threshold
dimension that state-of-the-art blank inspection tools can detect. Therefore it is believed that the Teron tool can detect
most phase defects on the wafer at 27 nm HP node L&S patterns when the defects are located at the center of the clear
pattern. Pit defects create larger CD errors than bump defects regardless of defect dimension. The simulation accuracy
obtained from bump defects seems to be better than that of pit defects. This is believed to be due to two facts. One is that
the AFM could be more accurate in measuring height for bump defects than depth for pit defects. The other is that CD
error is generally more sensitive to the dimension of pit defects due to the shadowing effect. Bump defects do not bridge
at 48nm but pit defects start to bridge over at 36nm. Figure 7 shows images from wafer exposure and simulation using
reconstructed ML geometry. The DPS simulation using the reconstructed ML geometry predicts the wafer patterning
very well for each dimension of bump and pit defects. For 24 nm defects, CD error with wafer defocus was investigated
for bump and pit defects respectively. The difference in CD error between wafer printing and simulation is affected by
defocus as shown in Figure 8. For bump defects, Figure 8(a), as defocus increases -100nm to +100nm, the CD error
difference increases from 0% to 2% for reconstructed ML geometry and goes from 0% to 4.5% for conformal ML
geometry. For pit defects, as defocus increases from -100nm to +100nm, the CD error difference increases from 1% to
~2.5% for reconstructed ML geometry and 0% to 10% for conformal ML geometry as shown in figure 8(b). The bump
Proc. of SPIE Vol. 8679 86790H-6
[ i l II
1 i 1i-1 r
1 I I I I Will
defect gives rise to larger CD error at the negative defocus and the CD error difference obtained from simulation and
wafer exposure congregates at ~12% at -100nm defocus. Pit defects show larger CD error at the positive defocus and the
CD error obtained from simulation and wafer exposure become similar to ~11% at -100nm defocus.
Figure 7. Comparison of the image obtained from wafer exposure and DPS simulation with reconstructed ML geometry
for (a) bump and (b) pit defect. The DPS shows good capability to predict the wafer image.
Figure 8. CD error as a function of defocus on 24nm defects for (a) bump defect and (b) pit defect; as defocus changes
from negative to positive, the CD error caused by bump defects decreases while CD error caused by pit defects increases.
Proc. of SPIE Vol. 8679 86790H-7
F = 50nm
F = 100nm
F = -100nm
F = -50nm
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Figure 9 is an image obtained from wafer exposure and simulation with reconstructed ML geometry. This figure shows
that the DPS combined with reconstructed ML geometry predicts the wafer patterning well through defocus for each
dimension of bump and pit defect. While the DPS has quite fast calculation time, it shows as good accuracy as RCWA
simulation does in 27nm HP L&S pattern. Figure 10 shows the comparison of the simulation result obtained from DPS
and RCWA for defect dimension and for defocus changes. In both cases, the CD error simulated from DPS and RCWA
agree well with each other and match well with the CD error from wafer exposure.
Figure 9. CD error as a function of defocus caused by 24nm dimension bump (a) and pit (b) defect
Figure 10. Comparison of the simulation result obtained from DPS and RCWA; (a) CD error with defect dimension and
(b) CD error with defocus changes simulated from both DPS and RCWA agree well with the CD error from wafer
Proc. of SPIE Vol. 8679 86790H-8
4. SUMMARY Download full-text
Defect on the substrate of EUV mask blank induces CD error on wafer. The amount of CD error caused by each native
defect having various dimensions could not be predicted well in simulation due to the difficulty in selecting the optimum
ML geometry for each defect. This study analyzed the defect dimension measured at the substrate and the surface of ML
and found correlation between them. As a result, it was possible to establish that reconstructed ML geometry gives better
prediction of CD error than the conventional conformal ML geometry. The DPS developed by Luminescent
Technologies shows good accuracy of simulation once the optimum ML geometry for each defect is selected. It is
observed that 24 nm bump and pit defects on substrate induce 8.5% and 12.5% of wafer CD error. Therefore it is
assumed that the Teron tool can detect most phase defects on the wafer at 27 nm HP node L&S patterns when the defects
are located at the center of the clear pattern.
The authors would like to thank Dr. Tsukasa Abe and Naoya Hayashi from Dai Nippon Printing for discussions about
mask manufacturing, Dr. Eric Gullikson from LBNL for providing metrology to measure the optical properties of
SEMATECH’s absorber, Gregg Inderhees from KLA-Tencor for providing blank inspection and Dr. Tae-Geun Kim and
Dr. Sang-Hyun Kim from Samsung for supporting the defect analysis for this study.
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