A Memory-Efficient Fingerprint Verification Algorithm Using a Multi-Resolution Accumulator Array

Etri Journal (Impact Factor: 0.77). 06/2003; 25(3):179-186. DOI: 10.4218/etrij.03.0102.3316


Using biometrics to verify a person's identity has several advantages over the present practices of personal identification numbers (PINs) and passwords. At the same time, improvements in VLSI technology have recently led to the introduction of smart cards with 32-bit RISC processors. To gain maximum security in verification systems using biometrics, verification as well as storage of the biometric pattern must be done in the smart card. However, because of the limited resources (processing power and memory space) of the smart card, integrating biometrics into it is still an open challenge. In this paper, we propose a fingerprint verification algorithm using a multi-resolution accumulator array that can be executed in restricted environments such as the smart card. We first evaluate both the number of instructions executed and the memory requirement for each step of a typical fingerprint verification algorithm. We then develop a memory-efficient algorithm for the most memory-consuming step (alignment) using a multi- resolution accumulator array. Our experimental results show that the proposed algorithm can reduce the required memory space by a factor of 40 and can be executed in real time in resource-constrained environments without significantly degrading accuracy.

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    Procedia - Social and Behavioral Sciences 12/2012; 51:980-984. DOI:10.1016/j.sbspro.2012.08.273
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    • "Thus, it is reasonable to assign the time-consuming steps to the client, rather than to the resource-constrained sensor. This kind of task assignment can be found in the combination of a smart card and card reader [8], [9]. That is, the time-consuming steps are assigned to the more powerful card reader, rather than the resource-constrained smart card. "
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    ABSTRACT: Biometric-based authentication can provide a strong security guarantee of the identity of users. However, the security of biometric data is particularly important as any compromise of the biometric data will be permanent. In this paper, we propose a secure and efficient protocol to transmit fingerprint images from a fingerprint sensor to a client by exploiting the characteristics of the fingerprint images. Because the fingerprint sensor is computationally limited, a standard encryption algorithm may not be applied to the full fingerprint images in real-time to guarantee the integrity and confidentiality of the fingerprint images transmitted. To reduce the computational workload on the resource-constrained sensor, we apply the encryption algorithm to a nonce for integrity and to a specific bitplane of each pixel of the fingerprint image for confidentiality. Experimental results show that the integrity and confidentiality of the fingerprint images can be guaranteed without any leakage of the fingerprint ridge information and can be completed in real-time on embedded processors.
    Etri Journal 08/2006; 28(4):444-452. DOI:10.4218/etrij.06.0106.0013 · 0.77 Impact Factor
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    • "needs to be performed by an in-card processor, not an external card reader [6]-[8]. This system is called a Match-on-Card because the verification operation is executed on the smart card. "
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    ABSTRACT: Using biometrics to verify a person's identity has several advantages over the present practice of personal identification numbers (PINs) and passwords. To gain maximum security in a verification system using biometrics, the computation of the verification as well as the storing of the biometric pattern has to take place in a smart card. However, there is an open issue of integrating biometrics into a smart card because of its limited resources (processing power and memory space). In this paper, we propose a speaker verification algorithm using a support vector machine (SVM) with a very few features, and implemented it on a 32-bit smart card. The proposed algorithm can reduce the required memory space by a factor of more than 100 and can be executed in real-time. Also, we propose a hardware design for the algorithm on a field-programmable gate array (FPGA)-based platform. Based on the experimental results, our SVM solution can provide superior performance over typical speaker verification solutions. Furthermore, our FPGA-based solution can achieve a speed-up of 50 times over a software-based solution.
    Etri Journal 06/2006; 28(3):320-328. DOI:10.4218/etrij.06.0105.0022 · 0.77 Impact Factor
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