Demonstration of reconfigurable electro-optical logic with
silicon photonic integrated circuits
Ciyuan Qiu,1Xin Ye,1Richard Soref,2Lin Yang,3and Qianfan Xu1,*
1Department of Electrical and Computer Engineering, Rice University, Houston, Texas 77005, USA
2Department of Physics, University of Massachusetts, Boston, Massachusetts 02125, USA
3Institute of Semiconductors, Chinese Academy of Sciences, P.O. Box 912, Beijing 100083, China
*Corresponding author: email@example.com
Received July 5, 2012; revised August 20, 2012; accepted August 21, 2012;
posted August 22, 2012 (Doc. ID 171932); published September 18, 2012
We demonstrate a scalable and reconfigurable optical directed-logic architecture consisting of a regular array of
integrated optical switches based on microring resonators. The switches are controlled by electrical input logic
signals through embedded p-i-n junctions. The circuit can be reconfigured to perform any combinational logic
operation by thermally tuning the operation modes of the switches. Here we show experimentally a directed
logic circuit based on a 2 × 2 array of switches. The circuit is reconfigured to perform arbitrary two-input logic
functions. © 2012 Optical Society of America
OCIS codes: 130.0130, 230.3750, 230.5750.
We have recently proposed a new (to our knowledge)
reconfigurable and cellular electro-optical (EO) logic ar-
chitecture  that is well suited for complementary
metal–oxide–semiconductor (CMOS)-compatible silicon
photonics. The idea is to create large-scale-integrated
(LSI) reconfigurable optical logic fabrics as an optical
equivalent of a field-programmable gate array (FPGA).
The design is based on the directed-logic paradigm that
minimizes the latency in calculating a complicated logic
function [2,3] by taking advantage of the fast and low-loss
propagation of light.
The logic circuit is formed by a uniform two-
dimensional array of reconfigurable on–off EO switches
connected by parallel optical waveguides. The state of
each switch is controlled by an electrical input logic sig-
nal. In this circuit, all the switches flip simultaneously,
and their switching times do not accumulate—in contrast
to electronic transistor logic circuits, wherein gate delays
are cascaded to introduce a relatively large latency. A
combinational logic function is calculated when its truth
table is mapped onto the operation modes of the
switches. The low latency and fast reconfigurability of
the logic circuit make it useful for many applications.
One example is to quickly look up a routing table in a
packet-switched optical interconnection network, where
the routing table can be dynamically updated .
In this Letter, we present a proof-of-concept demon-
stration using a multispectral implementation of the
electro-optic logic circuit as discussed in . With a
2 × 2 array of reconfigurable switches, this logic circuit
can perform arbitrary two-input logic functions.
The basic building block of the logic circuit is a
reconfigurable EO switch based on silicon microring re-
sonators [5–12]. Each switch has an embedded p-i-n junc-
tion for logic input and a microheater for reconfiguration.
This type of switch has small size , fast switching
speed , low power consumption [9,10], and the cap-
ability of large-scale integration . Each switch can
be reconfigured by thermal tuning [13,14] to one of three
operation modes, as will be shown in Fig. 1.
The EO logic circuits are fabricated in a CMOS photo-
nics foundry at the Institute of Microelectronics of
Singapore . The fabrication starts on a silicon-on-
insulator (SOI) wafer with 220 nm thick top silicon
and 3 μm thick buried oxide. Rib waveguides with a
500 nm width, 220 nm height, and 50 nm slab thickness
are used to construct the photonic circuit. The switches
are based on microring resonators with diameters of
∼10 μm that are side-coupled to straight waveguides. A
deep-UV lithography process is used to define the device
pattern, which is etched into the silicon layer by induc-
tively coupled plasma etching. Following the etching, the
p-i-n junctions are formed across the ring, as illustrated in
Fig. 1(a), by patterned ion implantations. A 1.6 μm thick
SiO2layer is then deposited onto the wafer using plasma-
enhanced chemical vapor deposition (PECVD). A 150 nm
thick patterned titanium nitride (TiN) layer is sputtered
on the oxide to form the microheaters. Another 500 nm
thick SiO2layer is deposited by PECVD. Finally, vias are
opened on the implanted areas and the microheaters, and
a 1.5 μm thick aluminum layer is sputtered and etched to
form the electric connections. After the fabrication pro-
cess, the contact pads on the chip are wire-bonded to a
nator after etching. The false color shows the implanted areas.
(b) Device mounted on a stage and wire-bonded to a PCB
board. (c) The transmission spectra of a switch in block/pass
mode for light at working wavelength λL. The red dashed curve
and the black solid curve are the spectra when the applied mod-
ulation signal is 0.89 and 0 V, respectively. (d) The transmission
spectra of a switch in pass/block mode. (e) The transmission
spectra of a switch in pass/pass mode.
(Color online) (a) SEM picture of the microring reso-
3942OPTICS LETTERS / Vol. 37, No. 19 / October 1, 2012
0146-9592/12/193942-03$15.00/0© 2012 Optical Society of America
custom-made interface board as shown in Fig. 1(b). The
microheaters are controlled by a computer through
digital-to-analog converters. The p-i-n junctions of
the switches are wire-bonded to SMA connectors with
50 Ohm terminal resistors for impedance matching.
The transmission spectra of the TE mode of a switch
are measured with a tunable laser. Sharp resonance dips
can be clearly seen in Fig. 1(c). When free carriers are
injected into the p-i-n junction with a forward bias vol-
tage of 0.89 V (logic “1”), the resonance blueshifts. The
depth of the resonance decreases due to the free-carrier
absorption effect . At the input laser wavelength of
λL? 1549.1 nm, the optical transmission is low when
the bias voltage is high (logic “1”) and the transmission
is high when the bias voltage is zero or negative (logic
“0”). We call this operation mode of the switch the
block/pass mode. In this mode, the quality factor is
41,000 for the pass state and 31,000 for the block state.
As the working wavelength is fixed at 1549.1 nm, the op-
eration mode can be reconfigured to be the pass/block
mode or the pass/pass mode, as shown in the Figs. 1(d)
and 1(e) respectively, by changing the heating power on
the integrated microheater. In the pass/block mode, the
switch has a 20 dB extinction ratio, while in the block/
pass mode, the switch has a 10 dB extinction ratio.
The thermo-optic reconfiguration time is measured to
be <35 μs. The insertion loss of each switch is ∼0.15 dB,
which can be further reduced with a larger tuning range.
The structure of the reconfigurable logic circuit for ar-
bitrary two-input logic functions is illustrated in Fig. 2.
Each of the two optical waveguides marked by the hor-
izontal black lines passes through two optical switches.
Represented by vertical black lines are an optical input
waveguide and an optical output waveguide. The red
lines represent the electrical logic input signals (oper-
ands A and B) applied on the optical switches. Each op-
erand controls two switches in different waveguides
simultaneously. Since light can pass a waveguide (corre-
sponding to an output logic “1”) when both switches are
in the pass state, the output of the waveguide carries a
product function (logic AND operation) depending on
the operation mode of the two switches. For example,
if the switch controlled by A is in the pass/block mode
and the switch controlled by B is in the block/pass mode,
the optical output carries the product A¯B. If the switch
controlled by A is in the pass/block mode and the other
switch is in the pass/pass mode, the optical output is A.
This way, any product between the two operands, their
inversion, and “1” can be obtained at the end of each hor-
izontal waveguide by reconfiguring the operation modes
of the two switches in this waveguide.
Any two-input combinational logic function can be ex-
pressed as a sum (logic OR operation) of two products.
The sum is performed by incoherently adding the output
optical signals from the two waveguides that calculate
the two products. In our design, the microrings in the
same horizontal waveguide are designed to have the
same diameter, while rings at different horizontal wave-
guides will have slightly different diameters. The two
waveguides can then operate at different wavelengths
to avoid optical interference. As the circuit diagrams
in Fig. 2 show, two lasers with different wavelengths
(λ1and λ2) are sent into the input waveguide (the vertical
line on the left). They are separated and dropped into the
two logic (horizontal) waveguides by the “passive” mi-
croring resonators at the crossing points. At the output
side of a logic waveguide, the light is redirected to an out-
put (vertical) waveguide if the product calculated by this
waveguide is part of the logic function to be calculated.
This is done by thermally tuning the output microring
resonator at the crossing point to be on resonance (repre-
sented by the orange circles) with the light in the wave-
guide. Otherwise, the output microring resonator will be
tuned away from the laser wavelength (represented by
the green dashed circles), and light in the horizontal
waveguide will not be collected by the vertical wave-
Light from the output waveguide is coupled to a fiber
and sent to a broadband photodetector that absorbs
photons at all source wavelengths and creates a photo-
current that sums the optical outputs from the horizontal
waveguides that couple to the output waveguide. The
output logic signal will be defined as “1” if any one of
the horizontal waveguides has a high-level output. This
performs the sum (logic OR) function of the products cal-
culated by the coupled horizontal waveguides.
Microheaters are integrated with the add/drop micror-
ing filters at the crossing points between the horizontal
and vertical waveguides for thermal tuning, but no p-i-n
junctions are embedded in these rings. At the crossing
points between the waveguides, the width of the wave-
guide is extended to be 1 μm in order to reduce the op-
tical loss . Inverse tapers with 180 nm wide tips
are integrated for input and output terminals of the
waveguides to enhance the coupling between the wave-
guides and tapered lens fibers . The coupling loss is
∼4.5 dB per facet.
We have realized all the sixteen possible two-input lo-
gic functions just by thermally reconfiguring the opera-
tion modes of the switches and tuning the output add/
drop microring resonators. Due to space limitations,
we show here the results for eight representative func-
tions. In all the demonstrations, the laser wavelengths
are fixed at 1549.10 and 1559.16 nm, and the two logic
signals are also fixed with a bit rate of 0.526 Gb∕s, a high
level of 0.8 V (logic “1”), and a low level of −1.2 V (logic
“0”).Thetotal consumed RF power is about 8 μW, and the
total heating power used in the demonstration ranges
from 24 to 26 mW for the different logic functions.
The output powers of the two lasers are both 5 dBm.
for different two-input logic functions.
(Color online) Circuit diagrams of the EO logic circuits
October 1, 2012 / Vol. 37, No. 19 / OPTICS LETTERS 3943
They are combined with a 50∕50 fiber coupler and then Download full-text
coupled into the circuit through a tapered lens fiber.
The circuit diagrams in Figs. 2(a)–2(h) show the opera-
logic function is performed. Figures 3(a)–3(h) show the
waveform of the output optical signal. In Figs. 3(a) and
3(b), the output logic signals are same as inputs A and
B, respectively. In Figs. 3(a)–3(d), only light from the
top waveguide is coupled to the output waveguide, be-
cause the logic function has only one product. In
to the case when one waveguide passes light and when
both waveguides pass light, respectively. Both will be
judged as logic “1”. In Figs. 3(d) and 3(f)–3(h), there are
some positive spikes between two consecutive “0”s and
some negative spikes between two consecutive “1”s. This
happens when one switch is turning off while the other
switch is turning on. The height of the spikes depends
on the timing of the rising and falling edges of the two
switches. Since the spikes are only at the bit transition
regions, they do not affect correct decoding of the bits.
In conclusion, we demonstrated a scalable and recon-
figurable optical logic architecture that is based on a
regular array of integrated optical switches. We show
a small-scale circuit that can be reconfigured to perform
arbitrary two-input combinational logic functions. The
demonstrated speed of ∼0.5 Gb∕s is currently limited
by the wire-bonding approach. Higher speed can be ex-
pected by improving the probing method, by using
reverse-biased p-n junctions [9,10] for faster switching.
This work was supported by the Air Force Office of
Scientific Research (AFOSR grants FA9550-12-1-0261
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input logic circuits shown in Fig. 2. The two input electrical con-
trol signals are non-return-to-zero (NRZ) 27− 1 pseudorandom
bit sequence signals at 526 MHz. They are both set to be 2Vpp
between −1.2 V and 0.8 V.
Waveforms of the output optical signal from the two-
3944 OPTICS LETTERS / Vol. 37, No. 19 / October 1, 2012