A bandwidth adjustable integrated optical receiver with an on-chip silicon avalanche photodetector

Abstract

A bandwidth adjustable integrated optical receiver hav-ing an on-chip silicon avalanche photodetector is realized with stan-dard 0.25-µm silicon-germanium bipolar complementary metal-oxide-semiconductor technology for optical interconnect applications. With the controllable capacitive degeneration technique, the optical receiver bandwidth can be adjusted for the best bit error rate performance.

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IEICE Electronics Express, Vol.8, No.7, 404–409
A bandwidth adjustable
integrated optical receiver
with an on-chip silicon
avalanche photodetector
Jin-Sung Youn1, Myung-Jae Lee1, Kang-Yeob Park1,
Holger R¨ ucker2, and Woo-Young Choi1a)
1Department of Electrical and Electronic Engineering, Yonsei University
134 Shinchon-dong, Seodaemoon-gu, Seoul, 120–749, Korea
2IHP, lm Technologiepark 25, 15236 Frankfurt (Oder), Germany
a) wchoi@yonsei.ac.kr
Abstract:
ing an on-chip silicon avalanche photodetector is realized with stan-
dard 0.25-µm silicon-germanium bipolar complementary metal-oxide-
semiconductor technology for optical interconnect applications. With
the controllable capacitive degeneration technique, the optical receiver
bandwidth can be adjusted for the best bit error rate performance.
Keywords: high-speed optical receiver, silicon avalanche photodetec-
tor, silicon-germanium BiCMOS, transimpedance amplifier
Classification: Fiber optics, Microwave photonics, Optical intercon-
nection, Photonic signal processing, Photonic integration and systems
A bandwidth adjustable integrated optical receiver hav-
References
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[2] H.-S. Kang, M.-J. Lee, and W.-Y. Choi, “Si avalanche photodetectors fab-
ricated in standard complementary metal-oxide-semiconductor process,”
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[3] M.-J. Lee and W.-Y. Choi, “A silicon avalanche photodetector fabricated
with standard CMOS technology with over 1 THz gain-bandwidth prod-
uct,” Opt. Express, vol. 18, no. 23, pp. 24189–24194, Nov. 2010.
[4] J.-S. Youn, M.-J. Lee, K.-Y. Park, H. R¨ ucker, and W.-Y. Choi, “7-Gb/s
monolithic photoreceiver fabricated with 0.25-µm SiGe BiCMOS technol-
ogy,” IEICE Electron. Express, vol. 7, no. 9, pp. 659–665, May 2010.
[5] P. Muller and Y. Leblebici, CMOS Multichannel Single-chip Receivers for
Multi-gigabit Optical Data Communications, Springer, 2007.
[6] K. Phang and D. A. Johns, “A CMOS optical preamplifier for wireless
infrared communications,” IEEE Trans. Circuits Syst. II, vol. 46, no. 7,
pp. 852–859, July 1999.
[7] B. Razavi, Design of Integrated Circuits for Optical Communications,
McGraw-Hill, New York, 2002.
c ?IEICE 2011
DOI: 10.1587/elex.8.404
Received December 20, 2010
Accepted March 18, 2011
Published April 10, 2011
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IEICE Electronics Express, Vol.8, No.7, 404–409
1 Introduction
As the required data rate is rapidly increasing in many interconnect appli-
cations, copper-based electrical interconnects face severe performance limi-
tations due to large frequency-dependent losses, cross-talk noises, size, and
power consumption. Fiber-optic techniques are gaining popularity as they
can solve above problems. In addition, silicon-based optical interconnect
techniques are emerging as a major driving force because they can provide low
fabrication costs and powerful integration schemes. High-performance germa-
nium photodetectors on silicon substrate have been demonstrated for 1.3-µm
and 1.5-µm applications [1]. It is also possible to realize 850-nm silicon pho-
todetectors without any process modification from the conventional silicon
processing technology. We have previously reported various types of silicon-
based avalanche photodetectors (Si APDs) which provide high responsivity
and large bandwidth [2, 3]. In addition, we have demonstrated a monolith-
ically integrated optical receiver having a Si APD fabricated with standard
silicon-germanium (SiGe) bipolar complementary metal-oxide-semiconductor
(BiCMOS) technology [4].
In this letter, we present an improved monolithic optical receiver with an
on-chip Si APD based on standard 0.25-µm SiGe BiCMOS technology. Com-
pared to the previous result [4], our receiver achieves better performance by
employing an improved Si APD and such circuit techniques as DC compen-
sation and capacitive degeneration. In particular, the new optical receiver
includes the adjustable capacitive degeneration block so that receiver band-
width can be optimized for the best bit error rate (BER) performance.
2 Bandwidth adjustable integrated optical receiver
Fig. 1(a) shows the simplified block diagram of the fabricated optical re-
ceiver. The cross-section of the fabricated Si APD and BiCMOS transis-
tors can be found in [4]. The optical receiver is composed of a Si APD, a
DC compensation circuit, a single-ended transimpedance amplifier (TIA), a
single-to-differential amplifier with a low-pass filter, and an output buffer.
The core of the chip occupies the area of 480µm × 150µm, and consumes
about 30mW excluding the output buffer with the supply voltage of 2.5V.
The Si APD is realized by a vertical P+/N-well junction, and the output
current is extracted from P+contact. Compared with the Si APD used in [4],
the active area size is reduced to 10µm × 10µm so that larger photodetection
bandwidth can be achieved. The measured 3-dB photodetection bandwidth
of the Si APD is about 3.5GHz with a 50-Ω load.
The TIA input node can suffer from undesired DC offset due to photode-
tector dark currents, amplifier offset, and/or DC component of the received
signal [5]. This DC offset can affect the bias points for transistors and, conse-
quently, the amplifier performance. This problem can be prevented by a DC
compensation circuit, which is composed of an error amplifier and a tran-
sistor (M1) acting as a variable current source. As shown in Fig. 1(b), the
voltage difference between node (A) and node (B), acting as a reference volt-
c ?IEICE 2011
DOI: 10.1587/elex.8.404
Received December 20, 2010
Accepted March 18, 2011
Published April 10, 2011
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IEICE Electronics Express, Vol.8, No.7, 404–409
Fig. 1. (a) Simplified block diagram of the optical re-
ceiver. (b) Circuit diagrams of the TIA and DC
compensation circuit.
age, is integrated by the error amplifier [6]. The output voltage of the error
amplifier controls the amount of current flowing through M1and the voltage
of node (A) tracks the reference voltage at node (B) to minimize the voltage
difference. As a result, the DC offset can be compensated. With this, TIA
bias points are kept stable, and output signal swing can be maximized.
The TIA is designed in the single-ended shunt-feedback configuration
with feedback resistance (RF) of 5kΩ. Although high feedback resistance
increases TIA input impedance which can limit the receiver bandwidth due
to a low-frequency pole, we choose the shunt-feedback configuration since
this configuration with low input-referred noise provides us the best signal-
to-noise ratio (SNR) for our receiver having Si APD, which has a substantial
amount of noises due to avalanche gain.
As shown in Fig. 1(b), the buffer contains the capacitive degeneration
block that enhances the receiver bandwidth. Compared to the active induc-
tor used in [4], capacitive degeneration requires less voltage headroom and,
consequently, lower supply voltage. It generates a zero in the receiver fre-
c ?IEICE 2011
DOI: 10.1587/elex.8.404
Received December 20, 2010
Accepted March 18, 2011
Published April 10, 2011
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IEICE Electronics Express, Vol.8, No.7, 404–409
Fig. 2. Measured photodetection frequency responses of
the fabricated optical receiver. Inset shows 3-dB
bandwidth of the integrated optical receiver as a
function of equivalent capacitance (Ceq).
quency response, whose location can be controlled by the impedance of the
parallel resistor and capacitors. With a capacitor array digitally controlled
by external switches, the equivalent capacitance (Ceq) can be controlled from
100fF to 400fF in steps of 50fF. The adjustable receiver bandwidth is im-
portant because the optimum receiver bandwidth depends on the data rates
as it is affected by both intersymbol interference (ISI) and noises [7]. The
single-ended output of the buffer is converted into fully differential signal by
single-to-differential amplifier with low-pass filter (RLPF = 20kΩ, CLPF =
7.5pF).
Fig. 2 shows the measured photodetection frequency responses of the
fabricated optical receiver. The optical receiver 3-dB bandwidth is about
2.86GHz with Ceqof 100fF, but it goes up to 5.6GHz with maximum Ceq
of 400fF. The inset in Fig. 2 shows the measured optical receiver 3-dB
bandwidth as a function of Ceq.
3 Optical data transmission results
In order to evaluate the fabricated optical receiver, optical data transmission
experiments were performed. An 850-nm laser diode was used as an optical
source and its output light was modulated by an external electro-optic mod-
ulator using a 231− 1 pseudo random bit sequence. The modulated optical
signals were transmitted through 4-m-long multimode fiber and injected into
the integrated optical receiver using lensed fiber. The Si APD was biased with
the reverse bias voltage of 12.3V which was experimentally determined to
maximize the SNR of the optical receiver. A commercially available 10-Gb/s
c ?IEICE 2011
DOI: 10.1587/elex.8.404
Received December 20, 2010
Accepted March 18, 2011
Published April 10, 2011
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IEICE Electronics Express, Vol.8, No.7, 404–409
Fig. 3. (a) BER performances as a function of equiva-
lent capacitance (Ceq) (b) BER performances as
a function of incident optical power (Popt) (c) Eye
diagrams of 4.25-, 6.25-, and 9-Gb/s data at out-
put of the limiting amplifier. The Poptis −4, −2,
and −2dBm, respectively.
c ?IEICE 2011
DOI: 10.1587/elex.8.404
Received December 20, 2010
Accepted March 18, 2011
Published April 10, 2011
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IEICE Electronics Express, Vol.8, No.7, 404–409
limiting amplifier was used to satisfy the input sensitivity requirement for a
BER tester.
Fig. 3(a) shows measured BER performances as a function of Ceqwhen
three different 4.25-, 6.25-, and 9-Gb/s optical data were transmitted. The
incident optical power was −4dBm for 4.25Gb/s and −2dBm for both 6.25
and 9Gb/s. The measurement results show the trade-off between ISI and
noise. With 6.25Gb/s, for example, the receiver bandwidth is insufficient
for Ceq below 250fF, resulting in more ISI and worse BER with smaller
Ceq. When Ceqis above 350fF, the BER gets worse with larger Ceqbecause
the receiver bandwidth is too large allowing excessive noises. For 9Gb/s,
the BER performance is limited by the receiver bandwidth. This clearly
demonstrates that the optimum receiver bandwidth depends on the data
rate, and our optical receiver with the capability for adjustable bandwidth
can be useful for optimizing the receiver performance for various data rates.
Fig. 3(b) shows measured BER performances as a function of incident op-
tical power with three different data rates, 4.25, 6.25, and 9Gb/s. The value
of Ceq is 200fF, 300fF and 400fF for 4.25, 6.25, and 9Gb/s, respectively.
Fig. 3(c) shows the eye diagrams for the best BER for each data rate.
4 Conclusion
A bandwidth adjustable integrated optical receiver with an on-chip Si APD
is implemented with standard 0.25-µm SiGe BiCMOS technology without
any process and layer modification. Using the high-performance Si APD and
the adjustable capacitive degeneration block, the optical receiver bandwidth
can be optimized to achieve the best BER performances for each data rate.
Acknowledgments
This work was supported by Mid-career Research Program through NRF
grant funded by the MEST [2010-0014798]. The authors are very thankful
to IDEC for EDA software support.
c ?IEICE 2011
DOI: 10.1587/elex.8.404
Received December 20, 2010
Accepted March 18, 2011
Published April 10, 2011
409